diff mbox series

[32/84] tcg: Add tlb_dyn_max_bits to TCGContext

Message ID 20230503072331.1747057-33-richard.henderson@linaro.org
State Superseded
Headers show
Series tcg: Build once for system, once for user | expand

Commit Message

Richard Henderson May 3, 2023, 7:22 a.m. UTC 
Disconnect guest tlb parameters from TCG compilation.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/tcg/tcg.h            | 1 +
 accel/tcg/translate-all.c    | 1 +
 tcg/aarch64/tcg-target.c.inc | 2 +-
 tcg/i386/tcg-target.c.inc    | 2 +-
 4 files changed, 4 insertions(+), 2 deletions(-)

Comments

Zhijian Li (Fujitsu)" via May 15, 2023, 4:41 p.m. UTC | #1 
On 5/3/23 09:22, Richard Henderson wrote:
> Disconnect guest tlb parameters from TCG compilation.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   include/tcg/tcg.h            | 1 +
>   accel/tcg/translate-all.c    | 1 +
>   tcg/aarch64/tcg-target.c.inc | 2 +-
>   tcg/i386/tcg-target.c.inc    | 2 +-
>   4 files changed, 4 insertions(+), 2 deletions(-)
>
Reviewed-by: Anton Johansson <anjo@rev.ng>
diff mbox series

Patch

diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index c507b0d653..719d719b58 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -556,6 +556,7 @@  struct TCGContext {
 #ifdef CONFIG_SOFTMMU
     int page_mask;
     uint8_t page_bits;
+    uint8_t tlb_dyn_max_bits;
 #endif
 
     TCGRegSet reserved_regs;
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 12d7febfee..f6c8ad1a18 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -360,6 +360,7 @@  TranslationBlock *tb_gen_code(CPUState *cpu,
 #ifdef CONFIG_SOFTMMU
     tcg_ctx->page_bits = TARGET_PAGE_BITS;
     tcg_ctx->page_mask = TARGET_PAGE_MASK;
+    tcg_ctx->tlb_dyn_max_bits = CPU_TLB_DYN_MAX_BITS;
 #endif
 
  tb_overflow:
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index 3819d15563..fa8f3a7629 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -1687,7 +1687,7 @@  static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
     ldst->oi = oi;
     ldst->addrlo_reg = addr_reg;
 
-    mask_type = (s->page_bits + CPU_TLB_DYN_MAX_BITS > 32
+    mask_type = (s->page_bits + s->tlb_dyn_max_bits > 32
                  ? TCG_TYPE_I64 : TCG_TYPE_I32);
 
     /* Load env_tlb(env)->f[mmu_idx].{mask,table} into {x0,x1}.  */
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 5f1c23b2a5..9eb4ae15b6 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -1975,7 +1975,7 @@  static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
         trexw = (ttype == TCG_TYPE_I32 ? 0 : P_REXW);
         if (TCG_TYPE_PTR == TCG_TYPE_I64) {
             hrexw = P_REXW;
-            if (s->page_bits + CPU_TLB_DYN_MAX_BITS > 32) {
+            if (s->page_bits + s->tlb_dyn_max_bits > 32) {
                 tlbtype = TCG_TYPE_I64;
                 tlbrexw = P_REXW;
             }