diff mbox series

[v2,10/10] xxhash: remove qemu_xxhash7

Message ID 20230503091756.1453057-11-alex.bennee@linaro.org
State New
Headers show
Series tracing: remove dynamic vcpu state | expand

Commit Message

Alex Bennée May 3, 2023, 9:17 a.m. UTC 
Now we no longer have users for qemu_xxhash7 we can drop an additional
multiply and rol and make qemu_xxhash6 the implementation. Adjust the
smaller hash functions accordingly.

Message-Id: <20230420150009.1675181-11-alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 include/qemu/xxhash.h | 17 ++++-------------
 1 file changed, 4 insertions(+), 13 deletions(-)

Comments

Richard Henderson May 3, 2023, 10:07 a.m. UTC | #1 
On 5/3/23 10:17, Alex Bennée wrote:
> Now we no longer have users for qemu_xxhash7 we can drop an additional
> multiply and rol and make qemu_xxhash6 the implementation. Adjust the
> smaller hash functions accordingly.
> 
> Message-Id: <20230420150009.1675181-11-alex.bennee@linaro.org>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
> ---
>   include/qemu/xxhash.h | 17 ++++-------------
>   1 file changed, 4 insertions(+), 13 deletions(-)

Oh, well, I noticed during this review that we're not hashing cs_base, so probably 
expanding this to xxhash8 more proper.

cs_base is used for all kinds of important things, such as AArch64 flags expansion, so we 
might get better hashing performance by including it.


r~
diff mbox series

Patch

diff --git a/include/qemu/xxhash.h b/include/qemu/xxhash.h
index c2dcccadbf..bab7d4ca09 100644
--- a/include/qemu/xxhash.h
+++ b/include/qemu/xxhash.h
@@ -49,7 +49,7 @@ 
  * contiguous in memory.
  */
 static inline uint32_t
-qemu_xxhash7(uint64_t ab, uint64_t cd, uint32_t e, uint32_t f, uint32_t g)
+qemu_xxhash6(uint64_t ab, uint64_t cd, uint32_t e, uint32_t f)
 {
     uint32_t v1 = QEMU_XXHASH_SEED + PRIME32_1 + PRIME32_2;
     uint32_t v2 = QEMU_XXHASH_SEED + PRIME32_2;
@@ -86,9 +86,6 @@  qemu_xxhash7(uint64_t ab, uint64_t cd, uint32_t e, uint32_t f, uint32_t g)
     h32 += f * PRIME32_3;
     h32  = rol32(h32, 17) * PRIME32_4;
 
-    h32 += g * PRIME32_3;
-    h32  = rol32(h32, 17) * PRIME32_4;
-
     h32 ^= h32 >> 15;
     h32 *= PRIME32_2;
     h32 ^= h32 >> 13;
@@ -100,23 +97,17 @@  qemu_xxhash7(uint64_t ab, uint64_t cd, uint32_t e, uint32_t f, uint32_t g)
 
 static inline uint32_t qemu_xxhash2(uint64_t ab)
 {
-    return qemu_xxhash7(ab, 0, 0, 0, 0);
+    return qemu_xxhash6(ab, 0, 0, 0);
 }
 
 static inline uint32_t qemu_xxhash4(uint64_t ab, uint64_t cd)
 {
-    return qemu_xxhash7(ab, cd, 0, 0, 0);
+    return qemu_xxhash6(ab, cd, 0, 0);
 }
 
 static inline uint32_t qemu_xxhash5(uint64_t ab, uint64_t cd, uint32_t e)
 {
-    return qemu_xxhash7(ab, cd, e, 0, 0);
-}
-
-static inline uint32_t qemu_xxhash6(uint64_t ab, uint64_t cd, uint32_t e,
-                                    uint32_t f)
-{
-    return qemu_xxhash7(ab, cd, e, f, 0);
+    return qemu_xxhash6(ab, cd, e, 0);
 }
 
 /*