diff mbox series

[PULL,05/42] target/m68k: Finish conversion to tcg_gen_qemu_{ld, st}_*

Message ID 20230505212447.374546-6-richard.henderson@linaro.org
State Accepted
Commit b7a94da9550be04441ffd91f0865d604c8a804cd
Headers show
Series [PULL,01/42] softfloat: Fix the incorrect computation in float32_exp2 | expand

Commit Message

Richard Henderson May 5, 2023, 9:24 p.m. UTC
Convert away from the old interface with the implicit
MemOp argument.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230502135741.1158035-5-richard.henderson@linaro.org>
---
 target/m68k/translate.c | 76 ++++++++++++++---------------------------
 1 file changed, 25 insertions(+), 51 deletions(-)

Comments

Laurent Vivier May 8, 2023, 11:44 a.m. UTC | #1
Le 05/05/2023 à 23:24, Richard Henderson a écrit :
> Convert away from the old interface with the implicit
> MemOp argument.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> Reviewed-by: Anton Johansson <anjo@rev.ng>
> Message-Id: <20230502135741.1158035-5-richard.henderson@linaro.org>
> ---
>   target/m68k/translate.c | 76 ++++++++++++++---------------------------
>   1 file changed, 25 insertions(+), 51 deletions(-)
> 
> diff --git a/target/m68k/translate.c b/target/m68k/translate.c
> index 422f4652f1..744eb3748b 100644
> --- a/target/m68k/translate.c
> +++ b/target/m68k/translate.c
> @@ -304,23 +304,14 @@ static inline void gen_addr_fault(DisasContext *s)
>   static inline TCGv gen_load(DisasContext *s, int opsize, TCGv addr,
>                               int sign, int index)
>   {
> -    TCGv tmp;
> -    tmp = tcg_temp_new_i32();
> -    switch(opsize) {
> +    TCGv tmp = tcg_temp_new_i32();
> +
> +    switch (opsize) {
>       case OS_BYTE:
> -        if (sign)
> -            tcg_gen_qemu_ld8s(tmp, addr, index);
> -        else
> -            tcg_gen_qemu_ld8u(tmp, addr, index);
> -        break;
>       case OS_WORD:
> -        if (sign)
> -            tcg_gen_qemu_ld16s(tmp, addr, index);
> -        else
> -            tcg_gen_qemu_ld16u(tmp, addr, index);
> -        break;
>       case OS_LONG:
> -        tcg_gen_qemu_ld32u(tmp, addr, index);
> +        tcg_gen_qemu_ld_tl(tmp, addr, index,
> +                           opsize | (sign ? MO_SIGN : 0) | MO_TE);
>           break;
>       default:
>           g_assert_not_reached();
> @@ -332,15 +323,11 @@ static inline TCGv gen_load(DisasContext *s, int opsize, TCGv addr,
>   static inline void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val,
>                                int index)
>   {
> -    switch(opsize) {
> +    switch (opsize) {
>       case OS_BYTE:
> -        tcg_gen_qemu_st8(val, addr, index);
> -        break;
>       case OS_WORD:
> -        tcg_gen_qemu_st16(val, addr, index);
> -        break;
>       case OS_LONG:
> -        tcg_gen_qemu_st32(val, addr, index);
> +        tcg_gen_qemu_st_tl(val, addr, index, opsize | MO_TE);
>           break;
>       default:
>           g_assert_not_reached();
> @@ -971,23 +958,16 @@ static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp,
>       tmp = tcg_temp_new();
>       switch (opsize) {
>       case OS_BYTE:
> -        tcg_gen_qemu_ld8s(tmp, addr, index);
> -        gen_helper_exts32(cpu_env, fp, tmp);
> -        break;
>       case OS_WORD:
> -        tcg_gen_qemu_ld16s(tmp, addr, index);
> -        gen_helper_exts32(cpu_env, fp, tmp);
> -        break;
> -    case OS_LONG:
> -        tcg_gen_qemu_ld32u(tmp, addr, index);
> +        tcg_gen_qemu_ld_tl(tmp, addr, index, opsize | MO_SIGN | MO_TE);
>           gen_helper_exts32(cpu_env, fp, tmp);
>           break;
>       case OS_SINGLE:
> -        tcg_gen_qemu_ld32u(tmp, addr, index);
> +        tcg_gen_qemu_ld_tl(tmp, addr, index, MO_TEUL);
>           gen_helper_extf32(cpu_env, fp, tmp);
>           break;
>       case OS_DOUBLE:
> -        tcg_gen_qemu_ld64(t64, addr, index);
> +        tcg_gen_qemu_ld_i64(t64, addr, index, MO_TEUQ);
>           gen_helper_extf64(cpu_env, fp, t64);
>           break;
>       case OS_EXTENDED:
> @@ -995,11 +975,11 @@ static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp,
>               gen_exception(s, s->base.pc_next, EXCP_FP_UNIMP);
>               break;
>           }
> -        tcg_gen_qemu_ld32u(tmp, addr, index);
> +        tcg_gen_qemu_ld_i32(tmp, addr, index, MO_TEUL);
>           tcg_gen_shri_i32(tmp, tmp, 16);
>           tcg_gen_st16_i32(tmp, fp, offsetof(FPReg, l.upper));
>           tcg_gen_addi_i32(tmp, addr, 4);
> -        tcg_gen_qemu_ld64(t64, tmp, index);
> +        tcg_gen_qemu_ld_i64(t64, tmp, index, MO_TEUQ);
>           tcg_gen_st_i64(t64, fp, offsetof(FPReg, l.lower));
>           break;
>       case OS_PACKED:
> @@ -1024,24 +1004,18 @@ static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp,
>       tmp = tcg_temp_new();
>       switch (opsize) {
>       case OS_BYTE:
> -        gen_helper_reds32(tmp, cpu_env, fp);
> -        tcg_gen_qemu_st8(tmp, addr, index);
> -        break;
>       case OS_WORD:
> -        gen_helper_reds32(tmp, cpu_env, fp);
> -        tcg_gen_qemu_st16(tmp, addr, index);
> -        break;
>       case OS_LONG:
>           gen_helper_reds32(tmp, cpu_env, fp);
> -        tcg_gen_qemu_st32(tmp, addr, index);
> +        tcg_gen_qemu_st_tl(tmp, addr, index, opsize | MO_TE);
>           break;
>       case OS_SINGLE:
>           gen_helper_redf32(tmp, cpu_env, fp);
> -        tcg_gen_qemu_st32(tmp, addr, index);
> +        tcg_gen_qemu_st_tl(tmp, addr, index, MO_TEUL);
>           break;
>       case OS_DOUBLE:
>           gen_helper_redf64(t64, cpu_env, fp);
> -        tcg_gen_qemu_st64(t64, addr, index);
> +        tcg_gen_qemu_st_i64(t64, addr, index, MO_TEUQ);
>           break;
>       case OS_EXTENDED:
>           if (m68k_feature(s->env, M68K_FEATURE_CF_FPU)) {
> @@ -1050,10 +1024,10 @@ static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp,
>           }
>           tcg_gen_ld16u_i32(tmp, fp, offsetof(FPReg, l.upper));
>           tcg_gen_shli_i32(tmp, tmp, 16);
> -        tcg_gen_qemu_st32(tmp, addr, index);
> +        tcg_gen_qemu_st_i32(tmp, addr, index, MO_TEUL);
>           tcg_gen_addi_i32(tmp, addr, 4);
>           tcg_gen_ld_i64(t64, fp, offsetof(FPReg, l.lower));
> -        tcg_gen_qemu_st64(t64, tmp, index);
> +        tcg_gen_qemu_st_i64(t64, tmp, index, MO_TEUQ);
>           break;
>       case OS_PACKED:
>           /*
> @@ -2079,14 +2053,14 @@ DISAS_INSN(movep)
>       if (insn & 0x80) {
>           for ( ; i > 0 ; i--) {
>               tcg_gen_shri_i32(dbuf, reg, (i - 1) * 8);
> -            tcg_gen_qemu_st8(dbuf, abuf, IS_USER(s));
> +            tcg_gen_qemu_st_i32(dbuf, abuf, IS_USER(s), MO_UB);
>               if (i > 1) {
>                   tcg_gen_addi_i32(abuf, abuf, 2);
>               }
>           }
>       } else {
>           for ( ; i > 0 ; i--) {
> -            tcg_gen_qemu_ld8u(dbuf, abuf, IS_USER(s));
> +            tcg_gen_qemu_ld_tl(dbuf, abuf, IS_USER(s), MO_UB);
>               tcg_gen_deposit_i32(reg, reg, dbuf, (i - 1) * 8, 8);
>               if (i > 1) {
>                   tcg_gen_addi_i32(abuf, abuf, 2);
> @@ -4337,14 +4311,14 @@ static void m68k_copy_line(TCGv dst, TCGv src, int index)
>       t1 = tcg_temp_new_i64();
>   
>       tcg_gen_andi_i32(addr, src, ~15);
> -    tcg_gen_qemu_ld64(t0, addr, index);
> +    tcg_gen_qemu_ld_i64(t0, addr, index, MO_TEUQ);
>       tcg_gen_addi_i32(addr, addr, 8);
> -    tcg_gen_qemu_ld64(t1, addr, index);
> +    tcg_gen_qemu_ld_i64(t1, addr, index, MO_TEUQ);
>   
>       tcg_gen_andi_i32(addr, dst, ~15);
> -    tcg_gen_qemu_st64(t0, addr, index);
> +    tcg_gen_qemu_st_i64(t0, addr, index, MO_TEUQ);
>       tcg_gen_addi_i32(addr, addr, 8);
> -    tcg_gen_qemu_st64(t1, addr, index);
> +    tcg_gen_qemu_st_i64(t1, addr, index, MO_TEUQ);
>   }
>   
>   DISAS_INSN(move16_reg)
> @@ -4767,7 +4741,7 @@ static void gen_qemu_store_fcr(DisasContext *s, TCGv addr, int reg)
>   
>       tmp = tcg_temp_new();
>       gen_load_fcr(s, tmp, reg);
> -    tcg_gen_qemu_st32(tmp, addr, index);
> +    tcg_gen_qemu_st_tl(tmp, addr, index, MO_TEUL);
>   }
>   
>   static void gen_qemu_load_fcr(DisasContext *s, TCGv addr, int reg)
> @@ -4776,7 +4750,7 @@ static void gen_qemu_load_fcr(DisasContext *s, TCGv addr, int reg)
>       TCGv tmp;
>   
>       tmp = tcg_temp_new();
> -    tcg_gen_qemu_ld32u(tmp, addr, index);
> +    tcg_gen_qemu_ld_tl(tmp, addr, index, MO_TEUL);
>       gen_store_fcr(s, tmp, reg);
>   }
>   

This patch introduces a problem:

ERROR:.../target/m68k/translate.c:993:gen_load_fp: code should not be reached
Bail out! ERROR:.../target/m68k/translate.c:993:gen_load_fp: code should not be reached

$ wget http://vivier.eu/debian/ROMS/m68k-virt.petitboot
$ wget http://vivier.eu/debian/ROMS/m68k-virt.vmlinux

$ qemu-system-m68k -M virt   -m 3399672K   -chardev stdio,signal=off,mux=on,id=char0   -serial 
chardev:char0   -mon chardev=char0,mode=readline   -device virtio-rng-device  -kernel 
m68k-virt.vmlinux -initrd m68k-virt.petitboot

Thanks,
Laurent
Richard Henderson May 8, 2023, 1:11 p.m. UTC | #2
On 5/8/23 12:44, Laurent Vivier wrote:
> Le 05/05/2023 à 23:24, Richard Henderson a écrit :
>> Convert away from the old interface with the implicit
>> MemOp argument.
>>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> Reviewed-by: Anton Johansson <anjo@rev.ng>
>> Message-Id: <20230502135741.1158035-5-richard.henderson@linaro.org>
>> ---
>>   target/m68k/translate.c | 76 ++++++++++++++---------------------------
>>   1 file changed, 25 insertions(+), 51 deletions(-)
>>
>> diff --git a/target/m68k/translate.c b/target/m68k/translate.c
>> index 422f4652f1..744eb3748b 100644
>> --- a/target/m68k/translate.c
>> +++ b/target/m68k/translate.c
>> @@ -304,23 +304,14 @@ static inline void gen_addr_fault(DisasContext *s)
>>   static inline TCGv gen_load(DisasContext *s, int opsize, TCGv addr,
>>                               int sign, int index)
>>   {
>> -    TCGv tmp;
>> -    tmp = tcg_temp_new_i32();
>> -    switch(opsize) {
>> +    TCGv tmp = tcg_temp_new_i32();
>> +
>> +    switch (opsize) {
>>       case OS_BYTE:
>> -        if (sign)
>> -            tcg_gen_qemu_ld8s(tmp, addr, index);
>> -        else
>> -            tcg_gen_qemu_ld8u(tmp, addr, index);
>> -        break;
>>       case OS_WORD:
>> -        if (sign)
>> -            tcg_gen_qemu_ld16s(tmp, addr, index);
>> -        else
>> -            tcg_gen_qemu_ld16u(tmp, addr, index);
>> -        break;
>>       case OS_LONG:
>> -        tcg_gen_qemu_ld32u(tmp, addr, index);
>> +        tcg_gen_qemu_ld_tl(tmp, addr, index,
>> +                           opsize | (sign ? MO_SIGN : 0) | MO_TE);
>>           break;
>>       default:
>>           g_assert_not_reached();
>> @@ -332,15 +323,11 @@ static inline TCGv gen_load(DisasContext *s, int opsize, TCGv addr,
>>   static inline void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val,
>>                                int index)
>>   {
>> -    switch(opsize) {
>> +    switch (opsize) {
>>       case OS_BYTE:
>> -        tcg_gen_qemu_st8(val, addr, index);
>> -        break;
>>       case OS_WORD:
>> -        tcg_gen_qemu_st16(val, addr, index);
>> -        break;
>>       case OS_LONG:
>> -        tcg_gen_qemu_st32(val, addr, index);
>> +        tcg_gen_qemu_st_tl(val, addr, index, opsize | MO_TE);
>>           break;
>>       default:
>>           g_assert_not_reached();
>> @@ -971,23 +958,16 @@ static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, 
>> TCGv_ptr fp,
>>       tmp = tcg_temp_new();
>>       switch (opsize) {
>>       case OS_BYTE:
>> -        tcg_gen_qemu_ld8s(tmp, addr, index);
>> -        gen_helper_exts32(cpu_env, fp, tmp);
>> -        break;
>>       case OS_WORD:
>> -        tcg_gen_qemu_ld16s(tmp, addr, index);
>> -        gen_helper_exts32(cpu_env, fp, tmp);
>> -        break;
>> -    case OS_LONG:
>> -        tcg_gen_qemu_ld32u(tmp, addr, index);
>> +        tcg_gen_qemu_ld_tl(tmp, addr, index, opsize | MO_SIGN | MO_TE);
>>           gen_helper_exts32(cpu_env, fp, tmp);
>>           break;
>>       case OS_SINGLE:
>> -        tcg_gen_qemu_ld32u(tmp, addr, index);
>> +        tcg_gen_qemu_ld_tl(tmp, addr, index, MO_TEUL);
>>           gen_helper_extf32(cpu_env, fp, tmp);
>>           break;
>>       case OS_DOUBLE:
>> -        tcg_gen_qemu_ld64(t64, addr, index);
>> +        tcg_gen_qemu_ld_i64(t64, addr, index, MO_TEUQ);
>>           gen_helper_extf64(cpu_env, fp, t64);
>>           break;
>>       case OS_EXTENDED:
>> @@ -995,11 +975,11 @@ static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, 
>> TCGv_ptr fp,
>>               gen_exception(s, s->base.pc_next, EXCP_FP_UNIMP);
>>               break;
>>           }
>> -        tcg_gen_qemu_ld32u(tmp, addr, index);
>> +        tcg_gen_qemu_ld_i32(tmp, addr, index, MO_TEUL);
>>           tcg_gen_shri_i32(tmp, tmp, 16);
>>           tcg_gen_st16_i32(tmp, fp, offsetof(FPReg, l.upper));
>>           tcg_gen_addi_i32(tmp, addr, 4);
>> -        tcg_gen_qemu_ld64(t64, tmp, index);
>> +        tcg_gen_qemu_ld_i64(t64, tmp, index, MO_TEUQ);
>>           tcg_gen_st_i64(t64, fp, offsetof(FPReg, l.lower));
>>           break;
>>       case OS_PACKED:
>> @@ -1024,24 +1004,18 @@ static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, 
>> TCGv_ptr fp,
>>       tmp = tcg_temp_new();
>>       switch (opsize) {
>>       case OS_BYTE:
>> -        gen_helper_reds32(tmp, cpu_env, fp);
>> -        tcg_gen_qemu_st8(tmp, addr, index);
>> -        break;
>>       case OS_WORD:
>> -        gen_helper_reds32(tmp, cpu_env, fp);
>> -        tcg_gen_qemu_st16(tmp, addr, index);
>> -        break;
>>       case OS_LONG:
>>           gen_helper_reds32(tmp, cpu_env, fp);
>> -        tcg_gen_qemu_st32(tmp, addr, index);
>> +        tcg_gen_qemu_st_tl(tmp, addr, index, opsize | MO_TE);
>>           break;
>>       case OS_SINGLE:
>>           gen_helper_redf32(tmp, cpu_env, fp);
>> -        tcg_gen_qemu_st32(tmp, addr, index);
>> +        tcg_gen_qemu_st_tl(tmp, addr, index, MO_TEUL);
>>           break;
>>       case OS_DOUBLE:
>>           gen_helper_redf64(t64, cpu_env, fp);
>> -        tcg_gen_qemu_st64(t64, addr, index);
>> +        tcg_gen_qemu_st_i64(t64, addr, index, MO_TEUQ);
>>           break;
>>       case OS_EXTENDED:
>>           if (m68k_feature(s->env, M68K_FEATURE_CF_FPU)) {
>> @@ -1050,10 +1024,10 @@ static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, 
>> TCGv_ptr fp,
>>           }
>>           tcg_gen_ld16u_i32(tmp, fp, offsetof(FPReg, l.upper));
>>           tcg_gen_shli_i32(tmp, tmp, 16);
>> -        tcg_gen_qemu_st32(tmp, addr, index);
>> +        tcg_gen_qemu_st_i32(tmp, addr, index, MO_TEUL);
>>           tcg_gen_addi_i32(tmp, addr, 4);
>>           tcg_gen_ld_i64(t64, fp, offsetof(FPReg, l.lower));
>> -        tcg_gen_qemu_st64(t64, tmp, index);
>> +        tcg_gen_qemu_st_i64(t64, tmp, index, MO_TEUQ);
>>           break;
>>       case OS_PACKED:
>>           /*
>> @@ -2079,14 +2053,14 @@ DISAS_INSN(movep)
>>       if (insn & 0x80) {
>>           for ( ; i > 0 ; i--) {
>>               tcg_gen_shri_i32(dbuf, reg, (i - 1) * 8);
>> -            tcg_gen_qemu_st8(dbuf, abuf, IS_USER(s));
>> +            tcg_gen_qemu_st_i32(dbuf, abuf, IS_USER(s), MO_UB);
>>               if (i > 1) {
>>                   tcg_gen_addi_i32(abuf, abuf, 2);
>>               }
>>           }
>>       } else {
>>           for ( ; i > 0 ; i--) {
>> -            tcg_gen_qemu_ld8u(dbuf, abuf, IS_USER(s));
>> +            tcg_gen_qemu_ld_tl(dbuf, abuf, IS_USER(s), MO_UB);
>>               tcg_gen_deposit_i32(reg, reg, dbuf, (i - 1) * 8, 8);
>>               if (i > 1) {
>>                   tcg_gen_addi_i32(abuf, abuf, 2);
>> @@ -4337,14 +4311,14 @@ static void m68k_copy_line(TCGv dst, TCGv src, int index)
>>       t1 = tcg_temp_new_i64();
>>       tcg_gen_andi_i32(addr, src, ~15);
>> -    tcg_gen_qemu_ld64(t0, addr, index);
>> +    tcg_gen_qemu_ld_i64(t0, addr, index, MO_TEUQ);
>>       tcg_gen_addi_i32(addr, addr, 8);
>> -    tcg_gen_qemu_ld64(t1, addr, index);
>> +    tcg_gen_qemu_ld_i64(t1, addr, index, MO_TEUQ);
>>       tcg_gen_andi_i32(addr, dst, ~15);
>> -    tcg_gen_qemu_st64(t0, addr, index);
>> +    tcg_gen_qemu_st_i64(t0, addr, index, MO_TEUQ);
>>       tcg_gen_addi_i32(addr, addr, 8);
>> -    tcg_gen_qemu_st64(t1, addr, index);
>> +    tcg_gen_qemu_st_i64(t1, addr, index, MO_TEUQ);
>>   }
>>   DISAS_INSN(move16_reg)
>> @@ -4767,7 +4741,7 @@ static void gen_qemu_store_fcr(DisasContext *s, TCGv addr, int reg)
>>       tmp = tcg_temp_new();
>>       gen_load_fcr(s, tmp, reg);
>> -    tcg_gen_qemu_st32(tmp, addr, index);
>> +    tcg_gen_qemu_st_tl(tmp, addr, index, MO_TEUL);
>>   }
>>   static void gen_qemu_load_fcr(DisasContext *s, TCGv addr, int reg)
>> @@ -4776,7 +4750,7 @@ static void gen_qemu_load_fcr(DisasContext *s, TCGv addr, int reg)
>>       TCGv tmp;
>>       tmp = tcg_temp_new();
>> -    tcg_gen_qemu_ld32u(tmp, addr, index);
>> +    tcg_gen_qemu_ld_tl(tmp, addr, index, MO_TEUL);
>>       gen_store_fcr(s, tmp, reg);
>>   }
> 
> This patch introduces a problem:
> 
> ERROR:.../target/m68k/translate.c:993:gen_load_fp: code should not be reached
> Bail out! ERROR:.../target/m68k/translate.c:993:gen_load_fp: code should not be reached
> 
> $ wget http://vivier.eu/debian/ROMS/m68k-virt.petitboot
> $ wget http://vivier.eu/debian/ROMS/m68k-virt.vmlinux
> 
> $ qemu-system-m68k -M virt   -m 3399672K   -chardev stdio,signal=off,mux=on,id=char0   
> -serial chardev:char0   -mon chardev=char0,mode=readline   -device virtio-rng-device  
> -kernel m68k-virt.vmlinux -initrd m68k-virt.petitboot

Dang it.  This was noticed in review, I fixed it, and then apparently lost the change 
somehow.  Will fix.


r~
diff mbox series

Patch

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 422f4652f1..744eb3748b 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -304,23 +304,14 @@  static inline void gen_addr_fault(DisasContext *s)
 static inline TCGv gen_load(DisasContext *s, int opsize, TCGv addr,
                             int sign, int index)
 {
-    TCGv tmp;
-    tmp = tcg_temp_new_i32();
-    switch(opsize) {
+    TCGv tmp = tcg_temp_new_i32();
+
+    switch (opsize) {
     case OS_BYTE:
-        if (sign)
-            tcg_gen_qemu_ld8s(tmp, addr, index);
-        else
-            tcg_gen_qemu_ld8u(tmp, addr, index);
-        break;
     case OS_WORD:
-        if (sign)
-            tcg_gen_qemu_ld16s(tmp, addr, index);
-        else
-            tcg_gen_qemu_ld16u(tmp, addr, index);
-        break;
     case OS_LONG:
-        tcg_gen_qemu_ld32u(tmp, addr, index);
+        tcg_gen_qemu_ld_tl(tmp, addr, index,
+                           opsize | (sign ? MO_SIGN : 0) | MO_TE);
         break;
     default:
         g_assert_not_reached();
@@ -332,15 +323,11 @@  static inline TCGv gen_load(DisasContext *s, int opsize, TCGv addr,
 static inline void gen_store(DisasContext *s, int opsize, TCGv addr, TCGv val,
                              int index)
 {
-    switch(opsize) {
+    switch (opsize) {
     case OS_BYTE:
-        tcg_gen_qemu_st8(val, addr, index);
-        break;
     case OS_WORD:
-        tcg_gen_qemu_st16(val, addr, index);
-        break;
     case OS_LONG:
-        tcg_gen_qemu_st32(val, addr, index);
+        tcg_gen_qemu_st_tl(val, addr, index, opsize | MO_TE);
         break;
     default:
         g_assert_not_reached();
@@ -971,23 +958,16 @@  static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp,
     tmp = tcg_temp_new();
     switch (opsize) {
     case OS_BYTE:
-        tcg_gen_qemu_ld8s(tmp, addr, index);
-        gen_helper_exts32(cpu_env, fp, tmp);
-        break;
     case OS_WORD:
-        tcg_gen_qemu_ld16s(tmp, addr, index);
-        gen_helper_exts32(cpu_env, fp, tmp);
-        break;
-    case OS_LONG:
-        tcg_gen_qemu_ld32u(tmp, addr, index);
+        tcg_gen_qemu_ld_tl(tmp, addr, index, opsize | MO_SIGN | MO_TE);
         gen_helper_exts32(cpu_env, fp, tmp);
         break;
     case OS_SINGLE:
-        tcg_gen_qemu_ld32u(tmp, addr, index);
+        tcg_gen_qemu_ld_tl(tmp, addr, index, MO_TEUL);
         gen_helper_extf32(cpu_env, fp, tmp);
         break;
     case OS_DOUBLE:
-        tcg_gen_qemu_ld64(t64, addr, index);
+        tcg_gen_qemu_ld_i64(t64, addr, index, MO_TEUQ);
         gen_helper_extf64(cpu_env, fp, t64);
         break;
     case OS_EXTENDED:
@@ -995,11 +975,11 @@  static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp,
             gen_exception(s, s->base.pc_next, EXCP_FP_UNIMP);
             break;
         }
-        tcg_gen_qemu_ld32u(tmp, addr, index);
+        tcg_gen_qemu_ld_i32(tmp, addr, index, MO_TEUL);
         tcg_gen_shri_i32(tmp, tmp, 16);
         tcg_gen_st16_i32(tmp, fp, offsetof(FPReg, l.upper));
         tcg_gen_addi_i32(tmp, addr, 4);
-        tcg_gen_qemu_ld64(t64, tmp, index);
+        tcg_gen_qemu_ld_i64(t64, tmp, index, MO_TEUQ);
         tcg_gen_st_i64(t64, fp, offsetof(FPReg, l.lower));
         break;
     case OS_PACKED:
@@ -1024,24 +1004,18 @@  static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp,
     tmp = tcg_temp_new();
     switch (opsize) {
     case OS_BYTE:
-        gen_helper_reds32(tmp, cpu_env, fp);
-        tcg_gen_qemu_st8(tmp, addr, index);
-        break;
     case OS_WORD:
-        gen_helper_reds32(tmp, cpu_env, fp);
-        tcg_gen_qemu_st16(tmp, addr, index);
-        break;
     case OS_LONG:
         gen_helper_reds32(tmp, cpu_env, fp);
-        tcg_gen_qemu_st32(tmp, addr, index);
+        tcg_gen_qemu_st_tl(tmp, addr, index, opsize | MO_TE);
         break;
     case OS_SINGLE:
         gen_helper_redf32(tmp, cpu_env, fp);
-        tcg_gen_qemu_st32(tmp, addr, index);
+        tcg_gen_qemu_st_tl(tmp, addr, index, MO_TEUL);
         break;
     case OS_DOUBLE:
         gen_helper_redf64(t64, cpu_env, fp);
-        tcg_gen_qemu_st64(t64, addr, index);
+        tcg_gen_qemu_st_i64(t64, addr, index, MO_TEUQ);
         break;
     case OS_EXTENDED:
         if (m68k_feature(s->env, M68K_FEATURE_CF_FPU)) {
@@ -1050,10 +1024,10 @@  static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp,
         }
         tcg_gen_ld16u_i32(tmp, fp, offsetof(FPReg, l.upper));
         tcg_gen_shli_i32(tmp, tmp, 16);
-        tcg_gen_qemu_st32(tmp, addr, index);
+        tcg_gen_qemu_st_i32(tmp, addr, index, MO_TEUL);
         tcg_gen_addi_i32(tmp, addr, 4);
         tcg_gen_ld_i64(t64, fp, offsetof(FPReg, l.lower));
-        tcg_gen_qemu_st64(t64, tmp, index);
+        tcg_gen_qemu_st_i64(t64, tmp, index, MO_TEUQ);
         break;
     case OS_PACKED:
         /*
@@ -2079,14 +2053,14 @@  DISAS_INSN(movep)
     if (insn & 0x80) {
         for ( ; i > 0 ; i--) {
             tcg_gen_shri_i32(dbuf, reg, (i - 1) * 8);
-            tcg_gen_qemu_st8(dbuf, abuf, IS_USER(s));
+            tcg_gen_qemu_st_i32(dbuf, abuf, IS_USER(s), MO_UB);
             if (i > 1) {
                 tcg_gen_addi_i32(abuf, abuf, 2);
             }
         }
     } else {
         for ( ; i > 0 ; i--) {
-            tcg_gen_qemu_ld8u(dbuf, abuf, IS_USER(s));
+            tcg_gen_qemu_ld_tl(dbuf, abuf, IS_USER(s), MO_UB);
             tcg_gen_deposit_i32(reg, reg, dbuf, (i - 1) * 8, 8);
             if (i > 1) {
                 tcg_gen_addi_i32(abuf, abuf, 2);
@@ -4337,14 +4311,14 @@  static void m68k_copy_line(TCGv dst, TCGv src, int index)
     t1 = tcg_temp_new_i64();
 
     tcg_gen_andi_i32(addr, src, ~15);
-    tcg_gen_qemu_ld64(t0, addr, index);
+    tcg_gen_qemu_ld_i64(t0, addr, index, MO_TEUQ);
     tcg_gen_addi_i32(addr, addr, 8);
-    tcg_gen_qemu_ld64(t1, addr, index);
+    tcg_gen_qemu_ld_i64(t1, addr, index, MO_TEUQ);
 
     tcg_gen_andi_i32(addr, dst, ~15);
-    tcg_gen_qemu_st64(t0, addr, index);
+    tcg_gen_qemu_st_i64(t0, addr, index, MO_TEUQ);
     tcg_gen_addi_i32(addr, addr, 8);
-    tcg_gen_qemu_st64(t1, addr, index);
+    tcg_gen_qemu_st_i64(t1, addr, index, MO_TEUQ);
 }
 
 DISAS_INSN(move16_reg)
@@ -4767,7 +4741,7 @@  static void gen_qemu_store_fcr(DisasContext *s, TCGv addr, int reg)
 
     tmp = tcg_temp_new();
     gen_load_fcr(s, tmp, reg);
-    tcg_gen_qemu_st32(tmp, addr, index);
+    tcg_gen_qemu_st_tl(tmp, addr, index, MO_TEUL);
 }
 
 static void gen_qemu_load_fcr(DisasContext *s, TCGv addr, int reg)
@@ -4776,7 +4750,7 @@  static void gen_qemu_load_fcr(DisasContext *s, TCGv addr, int reg)
     TCGv tmp;
 
     tmp = tcg_temp_new();
-    tcg_gen_qemu_ld32u(tmp, addr, index);
+    tcg_gen_qemu_ld_tl(tmp, addr, index, MO_TEUL);
     gen_store_fcr(s, tmp, reg);
 }