| Message ID | 20230507182304.2934-3-jszhang@kernel.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add Sipeed Lichee Pi 4A RISC-V board support | expand |
diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs index 1cf69f958f10..ce10a38dff37 100644 --- a/arch/riscv/Kconfig.socs +++ b/arch/riscv/Kconfig.socs @@ -41,6 +41,12 @@ config ARCH_SUNXI This enables support for Allwinner sun20i platform hardware, including boards based on the D1 and D1s SoCs. +config ARCH_THEAD + bool "T-HEAD RISC-V SoCs" + select ERRATA_THEAD + help + This enables support for the RISC-V based T-HEAD SoCs. + config ARCH_VIRT def_bool SOC_VIRT
The first SoC in the T-HEAD series is light(a.k.a th1520), containing quad T-HEAD C910 cores. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- arch/riscv/Kconfig.socs | 6 ++++++ 1 file changed, 6 insertions(+)