diff mbox series

[1/2] media: verisilicon: rockchip_vpu2_hw_jpeg_enc: Consolidate setting of source buffer addresses

Message ID 20230509150249.824440-1-andri@yngvason.is
State New
Headers show
Series [1/2] media: verisilicon: rockchip_vpu2_hw_jpeg_enc: Consolidate setting of source buffer addresses | expand

Commit Message

Andri Yngvason May 9, 2023, 3:02 p.m. UTC
Signed-off-by: Andri Yngvason <andri@yngvason.is>
---
 .../verisilicon/rockchip_vpu2_hw_jpeg_enc.c   | 36 ++++++++++---------
 1 file changed, 19 insertions(+), 17 deletions(-)

Comments

Hans Verkuil May 23, 2023, 11:57 a.m. UTC | #1
Hi Andri,

On 09/05/2023 17:02, Andri Yngvason wrote:

Please provide a commit message!

Thank you,

	Hans

> Signed-off-by: Andri Yngvason <andri@yngvason.is>
> ---
>  .../verisilicon/rockchip_vpu2_hw_jpeg_enc.c   | 36 ++++++++++---------
>  1 file changed, 19 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/media/platform/verisilicon/rockchip_vpu2_hw_jpeg_enc.c b/drivers/media/platform/verisilicon/rockchip_vpu2_hw_jpeg_enc.c
> index 8395c4d48dd0..52c76fb91c56 100644
> --- a/drivers/media/platform/verisilicon/rockchip_vpu2_hw_jpeg_enc.c
> +++ b/drivers/media/platform/verisilicon/rockchip_vpu2_hw_jpeg_enc.c
> @@ -32,6 +32,16 @@
>  
>  #define VEPU_JPEG_QUANT_TABLE_COUNT 16
>  
> +static inline u32 __vepu_reg_addr_for_plane(int plane)
> +{
> +	switch (plane) {
> +	case 0: return VEPU_REG_ADDR_IN_PLANE_0;
> +	case 1: return VEPU_REG_ADDR_IN_PLANE_1;
> +	case 2: return VEPU_REG_ADDR_IN_PLANE_2;
> +	}
> +	return 0;
> +}
> +
>  static void rockchip_vpu2_set_src_img_ctrl(struct hantro_dev *vpu,
>  					   struct hantro_ctx *ctx)
>  {
> @@ -70,35 +80,27 @@ static void rockchip_vpu2_jpeg_enc_set_buffers(struct hantro_dev *vpu,
>  					       struct vb2_buffer *dst_buf)
>  {
>  	struct v4l2_pix_format_mplane *pix_fmt = &ctx->src_fmt;
> -	dma_addr_t src[3];
> +	unsigned int num_planes = pix_fmt->num_planes;
> +	unsigned int i;
> +	dma_addr_t src;
>  	u32 size_left;
>  
>  	size_left = vb2_plane_size(dst_buf, 0) - ctx->vpu_dst_fmt->header_size;
>  	if (WARN_ON(vb2_plane_size(dst_buf, 0) < ctx->vpu_dst_fmt->header_size))
>  		size_left = 0;
>  
> -	WARN_ON(pix_fmt->num_planes > 3);
> +	WARN_ON(num_planes > 3);
> +	if (num_planes > 3)
> +		num_planes = 3;
>  
>  	vepu_write_relaxed(vpu, vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
>  				ctx->vpu_dst_fmt->header_size,
>  			   VEPU_REG_ADDR_OUTPUT_STREAM);
>  	vepu_write_relaxed(vpu, size_left, VEPU_REG_STR_BUF_LIMIT);
>  
> -	if (pix_fmt->num_planes == 1) {
> -		src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0);
> -		vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0);
> -	} else if (pix_fmt->num_planes == 2) {
> -		src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0);
> -		src[1] = vb2_dma_contig_plane_dma_addr(src_buf, 1);
> -		vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0);
> -		vepu_write_relaxed(vpu, src[1], VEPU_REG_ADDR_IN_PLANE_1);
> -	} else {
> -		src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0);
> -		src[1] = vb2_dma_contig_plane_dma_addr(src_buf, 1);
> -		src[2] = vb2_dma_contig_plane_dma_addr(src_buf, 2);
> -		vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0);
> -		vepu_write_relaxed(vpu, src[1], VEPU_REG_ADDR_IN_PLANE_1);
> -		vepu_write_relaxed(vpu, src[2], VEPU_REG_ADDR_IN_PLANE_2);
> +	for (i = 0; i < num_planes; i++) {
> +		src = vb2_dma_contig_plane_dma_addr(src_buf, i);
> +		vepu_write_relaxed(vpu, src, __vepu_reg_addr_for_plane(i));
>  	}
>  }
>
diff mbox series

Patch

diff --git a/drivers/media/platform/verisilicon/rockchip_vpu2_hw_jpeg_enc.c b/drivers/media/platform/verisilicon/rockchip_vpu2_hw_jpeg_enc.c
index 8395c4d48dd0..52c76fb91c56 100644
--- a/drivers/media/platform/verisilicon/rockchip_vpu2_hw_jpeg_enc.c
+++ b/drivers/media/platform/verisilicon/rockchip_vpu2_hw_jpeg_enc.c
@@ -32,6 +32,16 @@ 
 
 #define VEPU_JPEG_QUANT_TABLE_COUNT 16
 
+static inline u32 __vepu_reg_addr_for_plane(int plane)
+{
+	switch (plane) {
+	case 0: return VEPU_REG_ADDR_IN_PLANE_0;
+	case 1: return VEPU_REG_ADDR_IN_PLANE_1;
+	case 2: return VEPU_REG_ADDR_IN_PLANE_2;
+	}
+	return 0;
+}
+
 static void rockchip_vpu2_set_src_img_ctrl(struct hantro_dev *vpu,
 					   struct hantro_ctx *ctx)
 {
@@ -70,35 +80,27 @@  static void rockchip_vpu2_jpeg_enc_set_buffers(struct hantro_dev *vpu,
 					       struct vb2_buffer *dst_buf)
 {
 	struct v4l2_pix_format_mplane *pix_fmt = &ctx->src_fmt;
-	dma_addr_t src[3];
+	unsigned int num_planes = pix_fmt->num_planes;
+	unsigned int i;
+	dma_addr_t src;
 	u32 size_left;
 
 	size_left = vb2_plane_size(dst_buf, 0) - ctx->vpu_dst_fmt->header_size;
 	if (WARN_ON(vb2_plane_size(dst_buf, 0) < ctx->vpu_dst_fmt->header_size))
 		size_left = 0;
 
-	WARN_ON(pix_fmt->num_planes > 3);
+	WARN_ON(num_planes > 3);
+	if (num_planes > 3)
+		num_planes = 3;
 
 	vepu_write_relaxed(vpu, vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
 				ctx->vpu_dst_fmt->header_size,
 			   VEPU_REG_ADDR_OUTPUT_STREAM);
 	vepu_write_relaxed(vpu, size_left, VEPU_REG_STR_BUF_LIMIT);
 
-	if (pix_fmt->num_planes == 1) {
-		src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0);
-		vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0);
-	} else if (pix_fmt->num_planes == 2) {
-		src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0);
-		src[1] = vb2_dma_contig_plane_dma_addr(src_buf, 1);
-		vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0);
-		vepu_write_relaxed(vpu, src[1], VEPU_REG_ADDR_IN_PLANE_1);
-	} else {
-		src[0] = vb2_dma_contig_plane_dma_addr(src_buf, 0);
-		src[1] = vb2_dma_contig_plane_dma_addr(src_buf, 1);
-		src[2] = vb2_dma_contig_plane_dma_addr(src_buf, 2);
-		vepu_write_relaxed(vpu, src[0], VEPU_REG_ADDR_IN_PLANE_0);
-		vepu_write_relaxed(vpu, src[1], VEPU_REG_ADDR_IN_PLANE_1);
-		vepu_write_relaxed(vpu, src[2], VEPU_REG_ADDR_IN_PLANE_2);
+	for (i = 0; i < num_planes; i++) {
+		src = vb2_dma_contig_plane_dma_addr(src_buf, i);
+		vepu_write_relaxed(vpu, src, __vepu_reg_addr_for_plane(i));
 	}
 }