| Message ID | 20230518184541.2627-9-jszhang@kernel.org |
|---|---|
| State | Accepted |
| Commit | 1203f584fe66522b0cf294424a35b4cfbc747d71 |
| Headers | show |
| Series | Add Sipeed Lichee Pi 4A RISC-V board support | expand |
diff --git a/MAINTAINERS b/MAINTAINERS index e0ad886d3163..6df20c65798a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -18162,6 +18162,12 @@ F: drivers/perf/riscv_pmu.c F: drivers/perf/riscv_pmu_legacy.c F: drivers/perf/riscv_pmu_sbi.c +RISC-V THEAD SoC SUPPORT +M: Jisheng Zhang <jszhang@kernel.org> +L: linux-riscv@lists.infradead.org +S: Maintained +F: arch/riscv/boot/dts/thead/ + RNBD BLOCK DRIVERS M: Md. Haris Iqbal <haris.iqbal@ionos.com> M: Jack Wang <jinpu.wang@ionos.com>
Currently, I would like to maintain the T-HEAD RISC-V SoC support. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+)