diff mbox series

[v5,2/2] PCI: Don't assume root ports are power manageable

Message ID 20230530163947.230418-2-mario.limonciello@amd.com
State New
Headers show
Series None | expand

Commit Message

Mario Limonciello May 30, 2023, 4:39 p.m. UTC
Using a USB keyboard or mouse to wakeup the system from s2idle fails when
that xHCI device is connected to a USB-C port for an AMD USB4 router.

Due to commit 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend")
all PCIe ports go into D3 during s2idle.

When specific root ports are put into D3 over s2idle on some AMD platforms
it is not possible for the platform to properly identify wakeup sources.
This happens whether the root port goes into D3hot or D3cold.

Comparing registers between Linux and Windows 11 this behavior to put
these specific root ports into D3 at suspend is unique to Linux. On an
affected system Windows does not put those specific root ports into D3
over Modern Standby.

Windows avoids putting Root Ports that are not power manageable (e.g do
not have platform firmware support) into low power states.

Linux shouldn't assume root ports support D3 just because they're on a
machine newer than 2015, the ports should also be deemed power manageable.
Add an extra check explicitly for root ports to ensure D3 isn't selected
for them if they are not power-manageable through platform firmware.

Fixes: 9d26d3a8f1b0 ("PCI: Put PCIe ports into D3 during suspend")
Reported-by: Iain Lane <iain@orangesquash.org.uk>
Closes: https://forums.lenovo.com/t5/Ubuntu/Z13-can-t-resume-from-suspend-with-external-USB-keyboard/m-p/5217121
Acked-by: Rafael J. Wysocki <rafael@kernel.org>
Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
---
v4->v5:
 * Add tags
 * Fix title
 * Adjust commit message
v3->v4:
 * Move after refactor
---
 drivers/pci/pci.c | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Lukas Wunner June 7, 2023, 8:01 a.m. UTC | #1
On Tue, May 30, 2023 at 11:39:47AM -0500, Mario Limonciello wrote:
> +	/*
> +	 * It's not safe to put root ports that don't support power
> +	 * management into D3.
> +	 */
> +	if (pci_pcie_type(bridge) == PCI_EXP_TYPE_ROOT_PORT &&
> +	    !platform_pci_power_manageable(bridge))
> +		return false;
> +
>  	/*
>  	 * It should be safe to put PCIe ports from 2015 or newer
>  	 * to D3.

My recollection is that we began suspending Root Ports to D3hot because
otherwise low power states of the whole CPU package could not be reached
on certain Intel CPUs from the 2015+ era.

Do we know if the DSDT of all those systems contains the required ACPI
objects to continue runtime suspending their Root Ports after this change?
Otherwise these systems would experience a power regression.

Thanks,

Lukas
Mario Limonciello June 7, 2023, 8:36 p.m. UTC | #2
On 6/7/2023 3:01 AM, Lukas Wunner wrote:
> On Tue, May 30, 2023 at 11:39:47AM -0500, Mario Limonciello wrote:
>> +	/*
>> +	 * It's not safe to put root ports that don't support power
>> +	 * management into D3.
>> +	 */
>> +	if (pci_pcie_type(bridge) == PCI_EXP_TYPE_ROOT_PORT &&
>> +	    !platform_pci_power_manageable(bridge))
>> +		return false;
>> +
>>   	/*
>>   	 * It should be safe to put PCIe ports from 2015 or newer
>>   	 * to D3.
> My recollection is that we began suspending Root Ports to D3hot because
> otherwise low power states of the whole CPU package could not be reached
> on certain Intel CPUs from the 2015+ era.
>
> Do we know if the DSDT of all those systems contains the required ACPI
> objects to continue runtime suspending their Root Ports after this change?
> Otherwise these systems would experience a power regression.
>
> Thanks,
>
> Lukas
You might not have been CC'ed on my earlier patches, but
I was worried about a similar problem and at least in one
of the earlier versions was adjusting the existing
heuristic of ">= 2015" to "Intel & >= 2015".

That being said, this most recent version got R-b and A-b
tags from 3 Intel guys, I would think they cross
referenced reference systems to make that assertion before
adding tags.
diff mbox series

Patch

diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index d1fa040bcea7..d293db963327 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -3015,6 +3015,14 @@  bool pci_bridge_d3_possible(struct pci_dev *bridge)
 	if (dmi_check_system(bridge_d3_blacklist))
 		return false;
 
+	/*
+	 * It's not safe to put root ports that don't support power
+	 * management into D3.
+	 */
+	if (pci_pcie_type(bridge) == PCI_EXP_TYPE_ROOT_PORT &&
+	    !platform_pci_power_manageable(bridge))
+		return false;
+
 	/*
 	 * It should be safe to put PCIe ports from 2015 or newer
 	 * to D3.