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[v1,6/6] dt-bindings: riscv: cpus: switch to unevaluatedProperties: false

Message ID 20230610-koala-bronze-3592637a5d1f@spud
State Superseded
Headers show
Series dt-bindings: riscv: cpus: switch to unevaluatedProperties: false | expand

Commit Message

Conor Dooley June 10, 2023, 5:24 p.m. UTC
From: Conor Dooley <conor.dooley@microchip.com>

To permit validation of cpu nodes, swap "additionalProperties: true"
out for "unevaluatedProperties: false".

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 Documentation/devicetree/bindings/riscv/cpus.yaml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml
index 5e2db35411f1..d82d5c872a0e 100644
--- a/Documentation/devicetree/bindings/riscv/cpus.yaml
+++ b/Documentation/devicetree/bindings/riscv/cpus.yaml
@@ -152,7 +152,7 @@  required:
   - riscv,isa
   - interrupt-controller
 
-additionalProperties: true
+unevaluatedProperties: false
 
 examples:
   - |