From patchwork Tue Feb 28 17:45:41 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Stubbs X-Patchwork-Id: 6975 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 2B35E23EB0 for ; Tue, 28 Feb 2012 17:45:50 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id C8503A1887B for ; Tue, 28 Feb 2012 17:45:49 +0000 (UTC) Received: by iage36 with SMTP id e36so1647348iag.11 for ; Tue, 28 Feb 2012 09:45:49 -0800 (PST) Received: from mr.google.com ([10.50.207.72]) by 10.50.207.72 with SMTP id lu8mr23615734igc.0.1330451149338 (num_hops = 1); Tue, 28 Feb 2012 09:45:49 -0800 (PST) Received: by 10.50.207.72 with SMTP id lu8mr19111971igc.0.1330451149291; Tue, 28 Feb 2012 09:45:49 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.11.10 with SMTP id r10csp13863ibr; Tue, 28 Feb 2012 09:45:48 -0800 (PST) Received: by 10.50.89.201 with SMTP id bq9mr3007751igb.55.1330451148638; Tue, 28 Feb 2012 09:45:48 -0800 (PST) Received: from relay1.mentorg.com (relay1.mentorg.com. [192.94.38.131]) by mx.google.com with ESMTPS id j10si22622206pbd.54.2012.02.28.09.45.47 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 28 Feb 2012 09:45:48 -0800 (PST) Received-SPF: neutral (google.com: 192.94.38.131 is neither permitted nor denied by best guess record for domain of Andrew_Stubbs@mentor.com) client-ip=192.94.38.131; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.94.38.131 is neither permitted nor denied by best guess record for domain of Andrew_Stubbs@mentor.com) smtp.mail=Andrew_Stubbs@mentor.com Received: from svr-orw-exc-10.mgc.mentorg.com ([147.34.98.58]) by relay1.mentorg.com with esmtp id 1S2R7S-0006qP-JK from Andrew_Stubbs@mentor.com ; Tue, 28 Feb 2012 09:45:46 -0800 Received: from SVR-IES-FEM-01.mgc.mentorg.com ([137.202.0.104]) by SVR-ORW-EXC-10.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.4675); Tue, 28 Feb 2012 09:45:26 -0800 Received: from [172.30.11.195] (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server id 14.1.289.1; Tue, 28 Feb 2012 17:45:44 +0000 Message-ID: <4F4D12C5.9070805@codesourcery.com> Date: Tue, 28 Feb 2012 17:45:41 +0000 From: Andrew Stubbs User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:10.0.2) Gecko/20120216 Thunderbird/10.0.2 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" CC: "patches@linaro.org" Subject: [PATCH][ARM] NEON DImode neg X-OriginalArrivalTime: 28 Feb 2012 17:45:26.0156 (UTC) FILETIME=[C0E64CC0:01CCF640] X-Gm-Message-State: ALoCoQlT/okyFV7ZO9AqaOuP7h93km9K+i8EzClRp58ndx3fdZb9Nh3jxOsNNjTwtyfZudyRyg0A Hi all, This patch adds a DImode negate pattern for NEON. Unfortunately, the NEON vneg instruction only supports vectors, not singletons, so there's no direct way to do it in DImode, and the compiler ends up moving the value back to core registers, negating it, and returning to NEON afterwards: fmrrd r2, r3, d16 @ int negs r2, r2 sbc r3, r3, r3, lsl #1 fmdrr d16, r2, r3 @ int The new patch does it entirely in NEON: vmov.i32 d17, #0 @ di vsub.i64 d16, d17, d16 (Note that this is the result when combined with my recent patch for NEON DImode immediates. Without that you get a constant pool load.) OK for 4.8? Andrew 2012-02-28 Andrew Stubbs gcc/ * config/arm/arm.md (negdi2): Use gen_negdi2_neon. * config/arm/neon.md (negdi2_neon): New insn_and_split. --- gcc/config/arm/arm.md | 8 +++++++- gcc/config/arm/neon.md | 14 ++++++++++++++ 2 files changed, 21 insertions(+), 1 deletions(-) diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 751997f..f1dbbf7 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -4048,7 +4048,13 @@ (neg:DI (match_operand:DI 1 "s_register_operand" ""))) (clobber (reg:CC CC_REGNUM))])] "TARGET_EITHER" - "" + { + if (TARGET_NEON) + { + emit_insn (gen_negdi2_neon (operands[0], operands[1])); + DONE; + } + } ) ;; The constraints here are to prevent a *partial* overlap (where %Q0 == %R1). diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 757be01..d2cb3ee 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -922,6 +922,20 @@ (const_string "neon_int_3")))] ) +(define_insn_and_split "negdi2_neon" + [(set (match_operand:DI 0 "s_register_operand" "=w") + (neg:DI (match_operand:DI 1 "s_register_operand" "w"))) + (clobber (match_scratch:DI 2 "=w"))] + "TARGET_NEON" + "#" + "&& reload_completed" + [(set (match_dup 2) (const_int 0)) + (parallel [(set (match_dup 0) (minus:DI (match_dup 2) (match_dup 1))) + (clobber (reg:CC CC_REGNUM))])] + "" + [(set_attr "length" "8")] +) + (define_insn "*umin3_neon" [(set (match_operand:VDQIW 0 "s_register_operand" "=w") (umin:VDQIW (match_operand:VDQIW 1 "s_register_operand" "w")