diff mbox series

spi: spi-geni-qcom: enable SPI_CONTROLLER_MUST_TX for GPI DMA mode

Message ID 20230629095847.3648597-1-dmitry.baryshkov@linaro.org
State Accepted
Commit d10005837be83906bbd2078c3b4f9dfcbd6c95b6
Headers show
Series spi: spi-geni-qcom: enable SPI_CONTROLLER_MUST_TX for GPI DMA mode | expand

Commit Message

Dmitry Baryshkov June 29, 2023, 9:58 a.m. UTC
The GPI DMA mode requires for TX DMA to be prepared. Force SPI core to
provide TX buffer even if the caller didn't provide one by setting the
SPI_CONTROLLER_MUST_TX flag.

Unable to handle kernel NULL pointer dereference at virtual address 0000000000000010
Mem abort info:
  ESR = 0x0000000096000004
  EC = 0x25: DABT (current EL), IL = 32 bits
  SET = 0, FnV = 0
  EA = 0, S1PTW = 0
  FSC = 0x04: level 0 translation fault
Data abort info:
  ISV = 0, ISS = 0x00000004
  CM = 0, WnR = 0
user pgtable: 4k pages, 48-bit VAs, pgdp=0000000815b82000
[0000000000000010] pgd=0000000000000000, p4d=0000000000000000
Internal error: Oops: 0000000096000004 [#1] PREEMPT SMP
Modules linked in:
pstate: 61400005 (nZCv daif +PAN -UAO -TCO +DIT -SSBS BTYPE=--)
pc : gpi_prep_slave_sg+0x3a4/0x5a8
lr : gpi_prep_slave_sg+0xcc/0x5a8
sp : ffff80000a2c3930
x29: ffff80000a2c3930 x28: ffff80000a2c3c58 x27: ffff4e744d8307f0
x26: 0000000000000001 x25: ffff4e7440f55810 x24: 0000000000000000
x23: 0000000000000001 x22: 0000000000000001 x21: 0000000000000003
x20: ffff4e7440c1f800 x19: ffff4e744d1f8618 x18: ffffd8ac41787e68
x17: 000000040044ffff x16: 005000f2b5503510 x15: 0000000000000100
x14: ffff4e744d608000 x13: 0000000800000002 x12: 0000000600000004
x11: 0000000000000000 x10: fffffffffff9f980 x9 : 0000000000000000
x8 : ffff4e7440c1fa00 x7 : 0000000000000000 x6 : 000000000000003f
x5 : 00000000ffffffff x4 : 0000000000000900 x3 : 0000000000000200
x2 : 0000000100000000 x1 : ffff4e7451f73400 x0 : ffff4e744d1f8610
Call trace:
 gpi_prep_slave_sg+0x3a4/0x5a8
 spi_geni_transfer_one+0x190/0x558
 spi_transfer_one_message+0x424/0x800
 __spi_pump_transfer_message+0x248/0x670
 __spi_sync+0x2cc/0x3a8
 spi_sync+0x3c/0x68
 spidev_sync_read+0xb0/0x108
 spidev_read+0x54/0x110
 vfs_read+0xc8/0x270
 ksys_read+0xec/0x110
 __arm64_sys_read+0x24/0x38
 invoke_syscall+0x50/0x128
 el0_svc_common.constprop.0+0xd4/0x100
 do_el0_svc+0x40/0xa8
 el0_svc+0x34/0x108
 el0t_64_sync_handler+0xf4/0x120
 el0t_64_sync+0x190/0x198
Code: 94079d2b 17ffff94 a90573fb f940a660 (f9400b06)
---[ end trace 0000000000000000 ]---

Fixes: b59c122484ec ("spi: spi-geni-qcom: Add support for GPI dma")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 drivers/spi/spi-geni-qcom.c | 6 ++++++
 1 file changed, 6 insertions(+)
diff mbox series

Patch

diff --git a/drivers/spi/spi-geni-qcom.c b/drivers/spi/spi-geni-qcom.c
index a98b781b103a..15b39008a554 100644
--- a/drivers/spi/spi-geni-qcom.c
+++ b/drivers/spi/spi-geni-qcom.c
@@ -1098,6 +1098,12 @@  static int spi_geni_probe(struct platform_device *pdev)
 	if (mas->cur_xfer_mode == GENI_SE_FIFO)
 		spi->set_cs = spi_geni_set_cs;
 
+	/*
+	 * TX is required per GSI spec, see setup_gsi_xfer().
+	 */
+	if (mas->cur_xfer_mode == GENI_GPI_DMA)
+		spi->flags = SPI_CONTROLLER_MUST_TX;
+
 	ret = request_irq(mas->irq, geni_spi_isr, 0, dev_name(dev), spi);
 	if (ret)
 		goto spi_geni_release_dma;