From patchwork Thu Mar 1 05:40:03 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jingoo Han X-Patchwork-Id: 7028 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 3344723E48 for ; Thu, 1 Mar 2012 05:40:06 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id F1023A182D9 for ; Thu, 1 Mar 2012 05:40:05 +0000 (UTC) Received: by iage36 with SMTP id e36so469445iag.11 for ; Wed, 29 Feb 2012 21:40:05 -0800 (PST) Received: from mr.google.com ([10.50.95.230]) by 10.50.95.230 with SMTP id dn6mr9457962igb.0.1330580405509 (num_hops = 1); Wed, 29 Feb 2012 21:40:05 -0800 (PST) Received: by 10.50.95.230 with SMTP id dn6mr7749723igb.0.1330580405449; Wed, 29 Feb 2012 21:40:05 -0800 (PST) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.53.18 with SMTP id k18csp8337ibg; Wed, 29 Feb 2012 21:40:05 -0800 (PST) Received: by 10.68.204.129 with SMTP id ky1mr13103815pbc.21.1330580404782; Wed, 29 Feb 2012 21:40:04 -0800 (PST) Received: from mailout1.samsung.com (mailout1.samsung.com. [203.254.224.24]) by mx.google.com with ESMTP id p6si562168pbp.167.2012.02.29.21.40.04; Wed, 29 Feb 2012 21:40:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of jg1.han@samsung.com designates 203.254.224.24 as permitted sender) client-ip=203.254.224.24; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of jg1.han@samsung.com designates 203.254.224.24 as permitted sender) smtp.mail=jg1.han@samsung.com Received: from epcpsbgm1.samsung.com (mailout1.samsung.com [203.254.224.24]) by mailout1.samsung.com (Oracle Communications Messaging Exchange Server 7u4-19.01 64bit (built Sep 7 2010)) with ESMTP id <0M06002ZCYENQ260@mailout1.samsung.com>; Thu, 01 Mar 2012 14:40:03 +0900 (KST) X-AuditID: cbfee61a-b7b78ae000001ceb-9c-4f4f0bb3bd1c Received: from epmmp1.local.host ( [203.254.227.16]) by epcpsbgm1.samsung.com (MMPCPMTA) with SMTP id A5.07.07403.3BB0F4F4; Thu, 01 Mar 2012 14:40:03 +0900 (KST) Received: from DOJG1HAN02 ([12.23.119.56]) by mmp1.samsung.com (Oracle Communications Messaging Exchange Server 7u4-19.01 64bit (built Sep 7 2010)) with ESMTPA id <0M0600EEEYER8670@mmp1.samsung.com>; Thu, 01 Mar 2012 14:40:03 +0900 (KST) From: Jingoo Han To: linux-usb@vger.kernel.org, linux-samsung-soc@vger.kernel.org Cc: 'Greg Kroah-Hartman' , 'Kukjin Kim' , linux-arm-kernel@lists.infradead.org, 'Sangwook Lee' , 'Alan Stern' , 'Joonyoung Shim' , patches@linaro.org, linaro-dev@lists.linaro.org, 'Thomas Abraham' , 'Jingoo Han' Subject: [PATCH v2 2/2] USB: ehci-s5p: add DMA burst support Date: Thu, 01 Mar 2012 14:40:03 +0900 Message-id: <000801ccf76d$c01e2a00$405a7e00$%han@samsung.com> MIME-version: 1.0 Content-type: text/plain; charset=us-ascii Content-transfer-encoding: 7bit X-Mailer: Microsoft Office Outlook 12.0 Thread-index: Acz3bb/9b76+awXbRC6lpXNp+9mWkg== Content-language: ko X-Brightmail-Tracker: AAAAAA== X-Gm-Message-State: ALoCoQlsKDtPNzxNjd6ucHXSmpxp0mu9sFPaO8+lUQ5PompOFAGzYQvueQIbLXiZeUq3Nv0CC345 DMA burst support is added to improve performance in EHCI data transfer. The USB EHCI controller on Exynos SoCs can use INCR16, INCR8, and INCR4 mode. These modes of INSNREG00 register should be set in order to enable DMA burst transfer. This feature is also related to AHB spec. Signed-off-by: Jingoo Han Cc: Sangwook Lee --- v2: change the definition name from EHCI_ENA_xxx to EHCI_INSNREG00_ENA_xxx. drivers/usb/host/ehci-s5p.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/drivers/usb/host/ehci-s5p.c b/drivers/usb/host/ehci-s5p.c index 293f741..b337f72 100644 --- a/drivers/usb/host/ehci-s5p.c +++ b/drivers/usb/host/ehci-s5p.c @@ -16,6 +16,7 @@ #include #include #include +#include struct s5p_ehci_hcd { struct device *dev; @@ -128,6 +129,9 @@ static int __devinit s5p_ehci_probe(struct platform_device *pdev) ehci->regs = hcd->regs + HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase)); + /* DMA burst Enable */ + writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs)); + dbg_hcs_params(ehci, "reset"); dbg_hcc_params(ehci, "reset"); @@ -234,6 +238,9 @@ static int s5p_ehci_resume(struct device *dev) if (pdata && pdata->phy_init) pdata->phy_init(pdev, S5P_USB_PHY_HOST); + /* DMA burst Enable */ + writel(EHCI_INSNREG00_ENABLE_DMA_BURST, EHCI_INSNREG00(hcd->regs)); + if (time_before(jiffies, ehci->next_statechange)) msleep(100);