From patchwork Tue Jul 5 05:23:48 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 71386 Delivered-To: patch@linaro.org Received: by 10.140.28.4 with SMTP id 4csp126981qgy; Mon, 4 Jul 2016 22:24:37 -0700 (PDT) X-Received: by 10.98.19.77 with SMTP id b74mr28781224pfj.145.1467696277214; Mon, 04 Jul 2016 22:24:37 -0700 (PDT) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 87si2191372pfn.73.2016.07.04.22.24.36; Mon, 04 Jul 2016 22:24:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754524AbcGEFYU (ORCPT + 30 others); Tue, 5 Jul 2016 01:24:20 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:57773 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753568AbcGEFYD (ORCPT ); Tue, 5 Jul 2016 01:24:03 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id u655MWU2018131; Tue, 5 Jul 2016 00:22:32 -0500 Received: from DFLE73.ent.ti.com (dfle73.ent.ti.com [128.247.5.110]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id u655O2dh016811; Tue, 5 Jul 2016 00:24:02 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DFLE73.ent.ti.com (128.247.5.110) with Microsoft SMTP Server id 14.3.294.0; Tue, 5 Jul 2016 00:24:01 -0500 Received: from a0393678ub.india.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id u655Nv2R001289; Tue, 5 Jul 2016 00:24:00 -0500 From: Kishon Vijay Abraham I To: CC: , Subject: [PATCH 01/10] phy: xgene: rename "enum phy_mode" to "enum xgene_phy_mode" Date: Tue, 5 Jul 2016 10:53:48 +0530 Message-ID: <1467696237-27831-2-git-send-email-kishon@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1467696237-27831-1-git-send-email-kishon@ti.com> References: <1467696237-27831-1-git-send-email-kishon@ti.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org No functional change. Rename "enum phy_mode" to "enum xgene_phy_mode" in xgene phy driver in preparation for adding set_mode callback in phy core. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Loc Ho --- drivers/phy/phy-xgene.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 1.7.9.5 diff --git a/drivers/phy/phy-xgene.c b/drivers/phy/phy-xgene.c index 385362e..ae266e0 100644 --- a/drivers/phy/phy-xgene.c +++ b/drivers/phy/phy-xgene.c @@ -518,7 +518,7 @@ enum clk_type_t { CLK_INT_SING = 2, /* Internal single ended */ }; -enum phy_mode { +enum xgene_phy_mode { MODE_SATA = 0, /* List them for simple reference */ MODE_SGMII = 1, MODE_PCIE = 2, @@ -542,7 +542,7 @@ struct xgene_sata_override_param { struct xgene_phy_ctx { struct device *dev; struct phy *phy; - enum phy_mode mode; /* Mode of operation */ + enum xgene_phy_mode mode; /* Mode of operation */ enum clk_type_t clk_type; /* Input clock selection */ void __iomem *sds_base; /* PHY CSR base addr */ struct clk *clk; /* Optional clock */