@@ -98,8 +98,12 @@ &gem3 {
phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gem3_default>;
- phy0: ethernet-phy@0 {
- reg = <0>;
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
};
};
@@ -91,12 +91,16 @@ &gem2 {
phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gem2_default>;
- phy0: ethernet-phy@5 {
- reg = <5>;
- ti,rx-internal-delay = <0x8>;
- ti,tx-internal-delay = <0xa>;
- ti,fifo-depth = <0x1>;
- ti,dp83867-rxctrl-strap-quirk;
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: ethernet-phy@5 {
+ reg = <5>;
+ ti,rx-internal-delay = <0x8>;
+ ti,tx-internal-delay = <0xa>;
+ ti,fifo-depth = <0x1>;
+ ti,dp83867-rxctrl-strap-quirk;
+ };
};
};
@@ -88,8 +88,12 @@ &gem0 {
status = "okay";
phy-handle = <&phy0>;
phy-mode = "rgmii-id";
- phy0: ethernet-phy@0 { /* VSC8211 */
- reg = <0>;
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: ethernet-phy@0 { /* VSC8211 */
+ reg = <0>;
+ };
};
};
@@ -116,17 +116,21 @@ &gem0 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <ðernet_phy0>;
- ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */
- reg = <0>;
- };
- ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */
- reg = <7>;
- };
- ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */
- reg = <3>;
- };
- ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */
- reg = <8>;
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ ethernet_phy0: ethernet-phy@0 { /* Marvell 88e1512 */
+ reg = <0>;
+ };
+ ethernet_phy7: ethernet-phy@7 { /* Vitesse VSC8211 */
+ reg = <7>;
+ };
+ ethernet_phy3: ethernet-phy@3 { /* Realtek RTL8211DN */
+ reg = <3>;
+ };
+ ethernet_phy8: ethernet-phy@8 { /* Vitesse VSC8211 */
+ reg = <8>;
+ };
};
};
@@ -77,8 +77,12 @@ &gem1 {
phy-mode = "rgmii-id";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gem1_default>;
- phy0: ethernet-phy@0 {
- reg = <0>;
+ mdio: mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ };
};
};
All zynqmp boards have been already described via mdio node that's why also convert zc1751. With using mdio node there is an option to add reset property for the whole mdio bus. Signed-off-by: Michal Simek <michal.simek@amd.com> --- .../dts/xilinx/zynqmp-zc1751-xm015-dc1.dts | 8 ++++-- .../dts/xilinx/zynqmp-zc1751-xm016-dc2.dts | 16 +++++++----- .../dts/xilinx/zynqmp-zc1751-xm017-dc3.dts | 8 ++++-- .../dts/xilinx/zynqmp-zc1751-xm018-dc4.dts | 26 +++++++++++-------- .../dts/xilinx/zynqmp-zc1751-xm019-dc5.dts | 8 ++++-- 5 files changed, 43 insertions(+), 23 deletions(-)