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[v3,12/12] arm: odp_cpu_cycles for arm

Message ID 20160726025625.7343-13-brian.brooks@linaro.org
State New
Headers show

Commit Message

Brian Brooks July 26, 2016, 2:56 a.m. UTC 
Signed-off-by: Brian Brooks <brian.brooks@linaro.org>

---
 platform/linux-generic/arch/arm/cpu_arch.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

-- 
2.9.0
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Patch

diff --git a/platform/linux-generic/arch/arm/cpu_arch.h b/platform/linux-generic/arch/arm/cpu_arch.h
index 19ee349..3881c2f 100644
--- a/platform/linux-generic/arch/arm/cpu_arch.h
+++ b/platform/linux-generic/arch/arm/cpu_arch.h
@@ -18,10 +18,26 @@  extern "C" {
 static inline uint64_t _odp_cpu_cycles(void)
 {
 #if defined(__aarch64__)
+	/* Read architected timer which runs at a fixed frequency independent
+	 * of the CPU frequency.
+	 */
 	uint64_t vct;
 	__asm__ volatile("isb" : : : "memory");
 	__asm__ volatile("mrs %0, cntvct_el0" : "=r" (vct));
 	return vct;
+#elif defined(__ARM_ARCH_7A__)
+	/* Try to read cycle count from PMU. */
+	uint32_t useren, cnten, cnt;
+	__asm__ volatile("mrc p15, 0, %0, c9, c14, 0" : "=r"(useren));
+	if (useren & 0x1) {
+		__asm__ volatile("mrc p15, 0, %0, c9, c12, 1" : "=r"(cnten));
+		if (cnten & 0x80000000ul) {
+			__asm__ volatile(
+				"mrc p15, 0, %0, c9, c13, 0" : "=r"(cnt));
+			return ((uint64_t) cnt) << 6;
+		}
+	}
+	return 0;
 #endif
 }