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[PULL,34/47] accel: Make accel-blocker.o target agnostic

Message ID	20231003173052.1601813-35-richard.henderson@linaro.org
State	New
Headers	show Delivered-To: patch@linaro.org Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>, Anton Johansson <anjo@rev.ng> Subject: [PULL 34/47] accel: Make accel-blocker.o target agnostic Date: Tue, 3 Oct 2023 10:30:39 -0700 Message-Id: <20231003173052.1601813-35-richard.henderson@linaro.org> In-Reply-To: <20231003173052.1601813-1-richard.henderson@linaro.org> References: <20231003173052.1601813-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::430; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org
Series	[PULL,01/47] accel: Rename accel_cpu_realizefn() -> accel_cpu_realize() \| expand [PULL,01/47] accel: Rename accel_cpu_realizefn() -> accel_cpu_realize() [PULL,02/47] accel: Rename AccelCPUClass::cpu_realizefn() -> cpu_target_realize() [PULL,03/47] accel: Rename accel_cpu_realize() -> accel_cpu_common_realize() [PULL,04/47] accel: Introduce accel_cpu_common_unrealize() stub [PULL,05/47] accel: Declare AccelClass::cpu_common_[un]realize() handlers [PULL,06/47] accel/tcg: Have tcg_exec_realizefn() return a boolean [PULL,07/47] accel/tcg: Restrict tcg_exec_[un]realizefn() to TCG [PULL,08/47] target/arm: Replace TARGET_PAGE_ENTRY_EXTRA [PULL,09/47] accel/tcg: Move CPUTLB definitions from cpu-defs.h [PULL,10/47] qom: Propagate alignment through type system [PULL,11/47] target/arm: Remove size and alignment for cpu subclasses [PULL,12/47] target/: Add instance_align to all cpu base classes [PULL,13/47] accel/tcg: Validate placement of CPUNegativeOffsetState [PULL,14/47] accel/tcg: Move CPUNegativeOffsetState into CPUState [PULL,15/47] accel/tcg: Remove CPUState.icount_decr_ptr [PULL,16/47] accel/tcg: Move can_do_io to CPUNegativeOffsetState [PULL,17/47] accel/tcg: Remove cpu_neg() [PULL,18/47] tcg: Rename cpu_env to tcg_env [PULL,19/47] accel/tcg: Replace CPUState.env_ptr with cpu_env() [PULL,20/47] accel/tcg: Remove cpu_set_cpustate_pointers [PULL,21/47] accel/tcg: Remove env_neg() [PULL,22/47] tcg: Remove TCGContext.tlb_fast_offset [PULL,23/47] accel/tcg: Modify tlb_() to use CPUState [PULL,24/47] accel/tcg: Modify probe_access_internal() to use CPUState [PULL,25/47] accel/tcg: Modify memory access functions to use CPUState [PULL,26/47] accel/tcg: Modify atomic_mmu_lookup() to use CPUState [PULL,27/47] accel/tcg: Use CPUState in atomicity helpers [PULL,28/47] accel/tcg: Remove env_tlb() [PULL,29/47] accel/tcg: Unify user and softmmu do_[st\|ld]*_mmu() [PULL,30/47] accel/tcg: move ld/st helpers to ldst_common.c.inc [PULL,31/47] exec: Make EXCP_FOO definitions target agnostic [PULL,32/47] exec: Move cpu_loop_foo() target agnostic functions to 'cpu-common.h' [PULL,33/47] accel/tcg: Restrict dump_exec_info() declaration [PULL,34/47] accel: Make accel-blocker.o target agnostic [PULL,35/47] accel: Rename accel-common.c -> accel-target.c [PULL,36/47] exec: Rename cpu.c -> cpu-target.c [PULL,37/47] exec: Rename target specific page-vary.c -> page-vary-target.c [PULL,38/47] accel/tcg: Rename target-specific 'internal.h' -> 'internal-target.h' [PULL,39/47] accel/tcg: Make monitor.c a target-agnostic unit [PULL,40/47] accel/tcg: Make icount.o a target agnostic unit [PULL,41/47] accel/tcg: Make cpu-exec-common.c a target agnostic unit [PULL,42/47] tcg: Remove argument to tcg_prologue_init [PULL,43/47] tcg: Split out tcg init functions to tcg/startup.h [PULL,44/47] linux-user/hppa: Fix struct target_sigcontext layout [PULL,45/47] build: Remove --enable-gprof [PULL,46/47] tests/avocado: Re-enable MIPS Malta tests (GitLab issue #1884 fixed) [PULL,47/47] tcg/loongarch64: Fix buid error

Commit Message

Richard Henderson Oct. 3, 2023, 5:30 p.m. UTC

From: Philippe Mathieu-Daudé <philmd@linaro.org>

accel-blocker.c is not target specific, move it to system_ss[].

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Anton Johansson <anjo@rev.ng>
Message-Id: <20230914185718.76241-5-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/meson.build | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff mbox series

Patch

diff --git a/accel/meson.build b/accel/meson.build
index 638a9a03ba..76f3cbc530 100644
--- a/accel/meson.build
+++ b/accel/meson.build
@@ -1,5 +1,5 @@ 
-specific_ss.add(files('accel-common.c', 'accel-blocker.c'))
-system_ss.add(files('accel-softmmu.c'))
+specific_ss.add(files('accel-common.c'))
+system_ss.add(files('accel-softmmu.c', 'accel-blocker.c'))
 user_ss.add(files('accel-user.c'))
 
 subdir('tcg')