diff mbox series

[17/18] target/mips: Make MIPS_CPU common to new MIPS32_CPU / MIPS64_CPU types

Message ID 20231010092901.99189-18-philmd@linaro.org
State New
Headers show
Series target: Make 'cpu-qom.h' really target agnostic | expand

Commit Message

Philippe Mathieu-Daudé Oct. 10, 2023, 9:28 a.m. UTC
"target/foo/cpu-qom.h" can not use any target specific definitions.

Currently "target/mips/cpu-qom.h" defines TYPE_MIPS_CPU depending
on the mips(32)/mips64 build type. This doesn't scale in a
heterogeneous context where we need to access both types concurrently.

In order to do that, introduce the new MIPS32_CPU / MIPS64_CPU types,
both inheriting a common TYPE_MIPS_CPU base type.

Keep the current CPU types registered in mips_register_cpudef_type()
as 32 or 64-bit, but instead of depending on the binary built being
targeting 32/64-bit, check whether the CPU is 64-bit by looking at
the CPU_MIPS64 bit.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 target/mips/cpu-qom.h | 13 ++++++-------
 target/mips/cpu.h     |  3 +++
 target/mips/cpu.c     | 11 ++++++++++-
 3 files changed, 19 insertions(+), 8 deletions(-)

Comments

Richard Henderson Oct. 13, 2023, 4:34 a.m. UTC | #1
On 10/10/23 02:28, Philippe Mathieu-Daudé wrote:
> "target/foo/cpu-qom.h" can not use any target specific definitions.
> 
> Currently "target/mips/cpu-qom.h" defines TYPE_MIPS_CPU depending
> on the mips(32)/mips64 build type. This doesn't scale in a
> heterogeneous context where we need to access both types concurrently.
> 
> In order to do that, introduce the new MIPS32_CPU / MIPS64_CPU types,
> both inheriting a common TYPE_MIPS_CPU base type.
> 
> Keep the current CPU types registered in mips_register_cpudef_type()
> as 32 or 64-bit, but instead of depending on the binary built being
> targeting 32/64-bit, check whether the CPU is 64-bit by looking at
> the CPU_MIPS64 bit.
> 
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>   target/mips/cpu-qom.h | 13 ++++++-------
>   target/mips/cpu.h     |  3 +++
>   target/mips/cpu.c     | 11 ++++++++++-
>   3 files changed, 19 insertions(+), 8 deletions(-)
> 
> diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
> index 9c98ca1956..1a71509b5e 100644
> --- a/target/mips/cpu-qom.h
> +++ b/target/mips/cpu-qom.h
> @@ -1,5 +1,5 @@
>   /*
> - * QEMU MIPS CPU
> + * QEMU MIPS CPU QOM header (target agnostic)
>    *
>    * Copyright (c) 2012 SUSE LINUX Products GmbH
>    *
> @@ -23,13 +23,12 @@
>   #include "hw/core/cpu.h"
>   #include "qom/object.h"
>   
> -#ifdef TARGET_MIPS64
> -#define TYPE_MIPS_CPU "mips64-cpu"
> -#else
> -#define TYPE_MIPS_CPU "mips-cpu"
> -#endif
> +#define TYPE_MIPS_CPU   "mips-cpu"
> +#define TYPE_MIPS32_CPU "mips32-cpu"
> +#define TYPE_MIPS64_CPU "mips64-cpu"
>   
> -OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)
> +OBJECT_DECLARE_CPU_TYPE(MIPS32CPU, MIPSCPUClass, MIPS32_CPU)
> +OBJECT_DECLARE_CPU_TYPE(MIPS64CPU, MIPSCPUClass, MIPS64_CPU)
>   
>   #define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
>   #define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
> index 6b026e6bcf..3b6d0a7a8a 100644
> --- a/target/mips/cpu.h
> +++ b/target/mips/cpu.h
> @@ -10,6 +10,9 @@
>   #include "hw/clock.h"
>   #include "mips-defs.h"
>   
> +/* Abstract QOM MIPS CPU, not exposed to other targets */
> +OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)

Why is this one moved back to cpu.h?
You exposed TYPE_X86_CPU in i386/cpu-qom.h...


r~
Philippe Mathieu-Daudé March 15, 2024, 12:22 p.m. UTC | #2
On 13/10/23 06:34, Richard Henderson wrote:
> On 10/10/23 02:28, Philippe Mathieu-Daudé wrote:
>> "target/foo/cpu-qom.h" can not use any target specific definitions.
>>
>> Currently "target/mips/cpu-qom.h" defines TYPE_MIPS_CPU depending
>> on the mips(32)/mips64 build type. This doesn't scale in a
>> heterogeneous context where we need to access both types concurrently.
>>
>> In order to do that, introduce the new MIPS32_CPU / MIPS64_CPU types,
>> both inheriting a common TYPE_MIPS_CPU base type.
>>
>> Keep the current CPU types registered in mips_register_cpudef_type()
>> as 32 or 64-bit, but instead of depending on the binary built being
>> targeting 32/64-bit, check whether the CPU is 64-bit by looking at
>> the CPU_MIPS64 bit.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>>   target/mips/cpu-qom.h | 13 ++++++-------
>>   target/mips/cpu.h     |  3 +++
>>   target/mips/cpu.c     | 11 ++++++++++-
>>   3 files changed, 19 insertions(+), 8 deletions(-)
>>
>> diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
>> index 9c98ca1956..1a71509b5e 100644
>> --- a/target/mips/cpu-qom.h
>> +++ b/target/mips/cpu-qom.h
>> @@ -1,5 +1,5 @@
>>   /*
>> - * QEMU MIPS CPU
>> + * QEMU MIPS CPU QOM header (target agnostic)
>>    *
>>    * Copyright (c) 2012 SUSE LINUX Products GmbH
>>    *
>> @@ -23,13 +23,12 @@
>>   #include "hw/core/cpu.h"
>>   #include "qom/object.h"
>> -#ifdef TARGET_MIPS64
>> -#define TYPE_MIPS_CPU "mips64-cpu"
>> -#else
>> -#define TYPE_MIPS_CPU "mips-cpu"
>> -#endif
>> +#define TYPE_MIPS_CPU   "mips-cpu"
>> +#define TYPE_MIPS32_CPU "mips32-cpu"
>> +#define TYPE_MIPS64_CPU "mips64-cpu"
>> -OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)
>> +OBJECT_DECLARE_CPU_TYPE(MIPS32CPU, MIPSCPUClass, MIPS32_CPU)
>> +OBJECT_DECLARE_CPU_TYPE(MIPS64CPU, MIPSCPUClass, MIPS64_CPU)
>>   #define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
>>   #define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
>> diff --git a/target/mips/cpu.h b/target/mips/cpu.h
>> index 6b026e6bcf..3b6d0a7a8a 100644
>> --- a/target/mips/cpu.h
>> +++ b/target/mips/cpu.h
>> @@ -10,6 +10,9 @@
>>   #include "hw/clock.h"
>>   #include "mips-defs.h"
>> +/* Abstract QOM MIPS CPU, not exposed to other targets */
>> +OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)
> 
> Why is this one moved back to cpu.h?
> You exposed TYPE_X86_CPU in i386/cpu-qom.h...

First thinking was to expose the base TYPE, so we can use QOM methods
to enumerate implementations, but not expose QOM state/class getter
for the base type (except in target/foo/). HW would use concrete
32 or 64b type state/class getter. I might be wrong, so I'll keep
the base type exposed for now. We might restrict later.
diff mbox series

Patch

diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h
index 9c98ca1956..1a71509b5e 100644
--- a/target/mips/cpu-qom.h
+++ b/target/mips/cpu-qom.h
@@ -1,5 +1,5 @@ 
 /*
- * QEMU MIPS CPU
+ * QEMU MIPS CPU QOM header (target agnostic)
  *
  * Copyright (c) 2012 SUSE LINUX Products GmbH
  *
@@ -23,13 +23,12 @@ 
 #include "hw/core/cpu.h"
 #include "qom/object.h"
 
-#ifdef TARGET_MIPS64
-#define TYPE_MIPS_CPU "mips64-cpu"
-#else
-#define TYPE_MIPS_CPU "mips-cpu"
-#endif
+#define TYPE_MIPS_CPU   "mips-cpu"
+#define TYPE_MIPS32_CPU "mips32-cpu"
+#define TYPE_MIPS64_CPU "mips64-cpu"
 
-OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)
+OBJECT_DECLARE_CPU_TYPE(MIPS32CPU, MIPSCPUClass, MIPS32_CPU)
+OBJECT_DECLARE_CPU_TYPE(MIPS64CPU, MIPSCPUClass, MIPS64_CPU)
 
 #define MIPS_CPU_TYPE_SUFFIX "-" TYPE_MIPS_CPU
 #define MIPS_CPU_TYPE_NAME(model) model MIPS_CPU_TYPE_SUFFIX
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 6b026e6bcf..3b6d0a7a8a 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -10,6 +10,9 @@ 
 #include "hw/clock.h"
 #include "mips-defs.h"
 
+/* Abstract QOM MIPS CPU, not exposed to other targets */
+OBJECT_DECLARE_CPU_TYPE(MIPSCPU, MIPSCPUClass, MIPS_CPU)
+
 #define TCG_GUEST_DEFAULT_MO (0)
 
 typedef struct CPUMIPSTLBContext CPUMIPSTLBContext;
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 83ee54f766..f43300dd5e 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -605,6 +605,14 @@  static const TypeInfo mips_cpu_types[] = {
         .abstract       = true,
         .class_size     = sizeof(MIPSCPUClass),
         .class_init     = mips_cpu_class_init,
+    }, {
+        .name           = TYPE_MIPS32_CPU,
+        .parent         = TYPE_MIPS_CPU,
+        .abstract       = true,
+    }, {
+        .name           = TYPE_MIPS64_CPU,
+        .parent         = TYPE_MIPS_CPU,
+        .abstract       = true,
     }
 };
 
@@ -621,7 +629,8 @@  static void mips_register_cpudef_type(const struct mips_def_t *def)
     char *typename = mips_cpu_type_name(def->name);
     TypeInfo ti = {
         .name = typename,
-        .parent = TYPE_MIPS_CPU,
+        .parent = def->insn_flags & CPU_MIPS64
+                  ? TYPE_MIPS64_CPU : TYPE_MIPS32_CPU,
         .class_init = mips_cpu_cpudef_class_init,
         .class_data = (void *)def,
     };