From patchwork Thu Aug 4 17:50:06 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Julien Grall X-Patchwork-Id: 73299 Delivered-To: patch@linaro.org Received: by 10.140.29.52 with SMTP id a49csp1519335qga; Thu, 4 Aug 2016 10:52:34 -0700 (PDT) X-Received: by 10.36.252.193 with SMTP id b184mr33772687ith.4.1470333152626; Thu, 04 Aug 2016 10:52:32 -0700 (PDT) Return-Path: Received: from lists.xenproject.org (lists.xenproject.org. [192.237.175.120]) by mx.google.com with ESMTPS id 21si4135559itz.9.2016.08.04.10.52.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 04 Aug 2016 10:52:32 -0700 (PDT) Received-SPF: neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) client-ip=192.237.175.120; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.237.175.120 is neither permitted nor denied by best guess record for domain of xen-devel-bounces@lists.xen.org) smtp.mailfrom=xen-devel-bounces@lists.xen.org Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bVMmj-0004cu-UG; Thu, 04 Aug 2016 17:50:21 +0000 Received: from mail6.bemta3.messagelabs.com ([195.245.230.39]) by lists.xenproject.org with esmtp (Exim 4.84_2) (envelope-from ) id 1bVMmi-0004bn-CM for xen-devel@lists.xen.org; Thu, 04 Aug 2016 17:50:20 +0000 Received: from [85.158.137.68] by server-13.bemta-3.messagelabs.com id 52/75-06162-B5083A75; Thu, 04 Aug 2016 17:50:19 +0000 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGLMWRWlGSWpSXmKPExsVysyfVTTe6YXG 4weYFvBZLPi5mcWD0OLr7N1MAYxRrZl5SfkUCa0bXmq/MBcfEKzYdvMHSwPhMsIuRi0NIYBOj xNHVX9kgnNOMEv3fLjF2MXJysAloStz5/IkJxBYRkJa49vkyWJxZwEHizcd7LCC2sECixLFJu 9lAbBYBVYmply+ygti8Ai4SO9acYwaxJQTkJE4emwwW5xRwlZh06gdYXAioZt26yywTGLkXMD KsYlQvTi0qSy3SNdJLKspMzyjJTczM0TU0MNbLTS0uTkxPzUlMKtZLzs/dxAj0bz0DA+MOxlP NzocYJTmYlER5X1UvDhfiS8pPqcxILM6ILyrNSS0+xCjDwaEkwfukDignWJSanlqRlpkDDDSY tAQHj5IIr1w9UJq3uCAxtzgzHSJ1ilFRSpz3NUifAEgiozQPrg0W3JcYZaWEeRkZGBiEeApSi 3IzS1DlXzGKczAqCfM6gIznycwrgZv+CmgxE9DiEwYLQBaXJCKkpBoYPcw+tcVplrU8vq636F 13COf8mbt8TcT5XKamu2/5psKTu7r30KcJ8l1+Nx7ZsWa/sp/iGpV9UKNrAmf3P6EzCxr4Viu tK9vu/PBVnZDgBNbJf0Ri1Y4tj1vokRBSEan88wxz3MzZ7ttuTzFIr17bvXGNqZn6vUSF/obJ sVzHHxrVqtrPzihSYinOSDTUYi4qTgQA7KoMwGkCAAA= X-Env-Sender: julien.grall@arm.com X-Msg-Ref: server-14.tower-31.messagelabs.com!1470333018!54056722!1 X-Originating-IP: [217.140.101.70] X-SpamReason: No, hits=0.0 required=7.0 tests= X-StarScan-Received: X-StarScan-Version: 8.77; banners=-,-,- X-VirusChecked: Checked Received: (qmail 16239 invoked from network); 4 Aug 2016 17:50:19 -0000 Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by server-14.tower-31.messagelabs.com with SMTP; 4 Aug 2016 17:50:19 -0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 73FE43A1; Thu, 4 Aug 2016 10:51:41 -0700 (PDT) Received: from e108454-lin.cambridge.arm.com (e108454-lin.cambridge.arm.com [10.1.218.32]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id D15293F387; Thu, 4 Aug 2016 10:50:17 -0700 (PDT) From: Julien Grall To: xen-devel@lists.xen.org Date: Thu, 4 Aug 2016 18:50:06 +0100 Message-Id: <1470333007-25178-6-git-send-email-julien.grall@arm.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1470333007-25178-1-git-send-email-julien.grall@arm.com> References: <1470333007-25178-1-git-send-email-julien.grall@arm.com> Cc: Julien Grall , sstabellini@kernel.org Subject: [Xen-devel] [PATCH v3 5/6] xen/arm: traps: Avoid unnecessary VA -> IPA translation in abort handlers X-BeenThere: xen-devel@lists.xen.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: xen-devel-bounces@lists.xen.org Sender: "Xen-devel" Translating a VA to a IPA is expensive. Currently, Xen is assuming that HPFAR_EL2 is only valid when the stage-2 data/instruction abort happened during a translation table walk of a first stage translation (i.e S1PTW is set). However, based on the ARM ARM (D7.2.34 in DDI 0487A.j), the register is also valid when the data/instruction abort occured for a translation fault. With this change, the VA -> IPA translation will only happen for permission faults that are not related to a translation table of a first stage translation. Signed-off-by: Julien Grall --- Changes in v3: - Use the correct union to get the s1ptw bit. Changes in v2: - Use fsc in the switch in do_trap_data_abort_guest --- xen/arch/arm/traps.c | 24 ++++++++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 46922eb..0ec0361 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -2382,13 +2382,28 @@ static inline paddr_t get_faulting_ipa(vaddr_t gva) return ipa; } +static inline bool hpfar_is_valid(bool s1ptw, uint8_t fsc) +{ + /* + * HPFAR is valid if one of the following cases are true: + * 1. the stage 2 fault happen during a stage 1 page table walk + * (the bit ESR_EL2.S1PTW is set) + * 2. the fault was due to a translation fault + * + * Note that technically HPFAR is valid for other cases, but they + * are currently not supported by Xen. + */ + return s1ptw || (fsc == FSC_FLT_TRANS); +} + static void do_trap_instr_abort_guest(struct cpu_user_regs *regs, const union hsr hsr) { int rc; register_t gva = READ_SYSREG(FAR_EL2); + uint8_t fsc = hsr.iabt.ifsc & ~FSC_LL_MASK; - switch ( hsr.iabt.ifsc & ~FSC_LL_MASK ) + switch ( fsc ) { case FSC_FLT_PERM: { @@ -2399,7 +2414,7 @@ static void do_trap_instr_abort_guest(struct cpu_user_regs *regs, .kind = hsr.iabt.s1ptw ? npfec_kind_in_gpt : npfec_kind_with_gla }; - if ( hsr.iabt.s1ptw ) + if ( hpfar_is_valid(hsr.iabt.s1ptw, fsc) ) gpa = get_faulting_ipa(gva); else { @@ -2434,6 +2449,7 @@ static void do_trap_data_abort_guest(struct cpu_user_regs *regs, const struct hsr_dabt dabt = hsr.dabt; int rc; mmio_info_t info; + uint8_t fsc = hsr.dabt.dfsc & ~FSC_LL_MASK; info.dabt = dabt; #ifdef CONFIG_ARM_32 @@ -2442,7 +2458,7 @@ static void do_trap_data_abort_guest(struct cpu_user_regs *regs, info.gva = READ_SYSREG64(FAR_EL2); #endif - if ( dabt.s1ptw ) + if ( hpfar_is_valid(dabt.s1ptw, fsc) ) info.gpa = get_faulting_ipa(info.gva); else { @@ -2451,7 +2467,7 @@ static void do_trap_data_abort_guest(struct cpu_user_regs *regs, return; /* Try again */ } - switch ( dabt.dfsc & ~FSC_LL_MASK ) + switch ( fsc ) { case FSC_FLT_PERM: {