[edk2,2/2] ArmPlatformPkg/PrePi: use correct callee saved regs

Message ID 1470408838-1020-2-git-send-email-ard.biesheuvel@linaro.org
State New
Headers show

Commit Message

Ard Biesheuvel Aug. 5, 2016, 2:53 p.m.
The AARCH64 version of the PrePi code 'preserves' values across a function
call using registers that are not in fact callee saved. So fix that.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

 ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S | 32 ++++++++++----------
 1 file changed, 16 insertions(+), 16 deletions(-)


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diff --git a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
index 9538c70a237c..e939d2c5aa5e 100644
--- a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
+++ b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
@@ -36,7 +36,7 @@  ASM_PFX(_ModuleEntryPoint):
   // Get ID of this CPU in Multicore system
   bl    ASM_PFX(ArmReadMpidr)
   // Keep a copy of the MpId register value
-  mov   x10, x0
+  mov   x20, x0
 // Check if we can install the stack at the top of the System Memory or if we need
@@ -88,55 +88,55 @@  _SetupStack:
   // Because the 'push' instruction is equivalent to 'stmdb' (decrement before), we need to increment
   // one to the top of the stack. We check if incrementing one does not overflow (case of DRAM at the
   // top of the memory space)
-  adds  x11, x1, #1
+  adds  x21, x1, #1
   b.cs  _SetupOverflowStack
-  mov   x1, x11
+  mov   x1, x21
   b     _GetBaseUefiMemory
   // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
   // aligned (4KB)
-  LoadConstantToReg (EFI_PAGE_MASK, x11)
-  and   x11, x11, x1
-  sub   x1, x1, x11
+  LoadConstantToReg (EFI_PAGE_MASK, x21)
+  and   x21, x21, x1
+  sub   x1, x1, x21
   // Calculate the Base of the UEFI Memory
-  sub   x11, x1, x4
+  sub   x21, x1, x4
   // r1 = The top of the Mpcore Stacks
   // Stack for the primary core = PrimaryCoreStack
   LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
-  sub   x12, x1, x2
+  sub   x22, x1, x2
   // Stack for the secondary core = Number of Cores - 1
   LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
   sub   x0, x0, #1
   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)
   mul   x1, x1, x0
-  sub   x12, x12, x1
+  sub   x22, x22, x1
-  // x12 = The base of the MpCore Stacks (primary stack & secondary stacks)
-  mov   x0, x12
-  mov   x1, x10
+  // x22 = The base of the MpCore Stacks (primary stack & secondary stacks)
+  mov   x0, x22
+  mov   x1, x20
   //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
   LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x3)
   bl    ASM_PFX(ArmPlatformStackSet)
   // Is it the Primary Core ?
-  mov   x0, x10
+  mov   x0, x20
   bl    ASM_PFX(ArmPlatformIsPrimaryCore)
   cmp   x0, #1
   bne   _PrepareArguments
-  mov   x0, x10
-  mov   x1, x11
-  mov   x2, x12
+  mov   x0, x20
+  mov   x1, x21
+  mov   x2, x22
   // Move sec startup address into a data register
   // Ensure we're jumping to FV version of the code (not boot remapped alias)