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[v3,48/88] target/hppa: Decode ADDB double-word

Message ID 20231102013016.369010-49-richard.henderson@linaro.org
State Superseded
Headers show
Series target/hppa: Implement hppa64 cpu | expand

Commit Message

Richard Henderson Nov. 2, 2023, 1:29 a.m. UTC
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/hppa/translate.c | 11 +++++++++++
 1 file changed, 11 insertions(+)
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Patch

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index 7f767fea64..1b4fa401ba 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -3143,6 +3143,17 @@  static bool do_addb(DisasContext *ctx, unsigned r, TCGv_reg in1,
     DisasCond cond;
     bool d = false;
 
+    /*
+     * For hppa64, the ADDB conditions change with PSW.W,
+     * dropping ZNV, SV, OD in favor of double-word EQ, LT, LE.
+     */
+    if (ctx->tb_flags & PSW_W) {
+        d = c >= 5;
+        if (d) {
+            c &= 3;
+        }
+    }
+
     in2 = load_gpr(ctx, r);
     dest = tcg_temp_new();
     sv = NULL;