From patchwork Tue Mar 27 20:23:33 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Stubbs X-Patchwork-Id: 7502 Return-Path: X-Original-To: patchwork@peony.canonical.com Delivered-To: patchwork@peony.canonical.com Received: from fiordland.canonical.com (fiordland.canonical.com [91.189.94.145]) by peony.canonical.com (Postfix) with ESMTP id 10EB423E01 for ; Tue, 27 Mar 2012 20:23:46 +0000 (UTC) Received: from mail-iy0-f180.google.com (mail-iy0-f180.google.com [209.85.210.180]) by fiordland.canonical.com (Postfix) with ESMTP id A99C5A18042 for ; Tue, 27 Mar 2012 20:23:45 +0000 (UTC) Received: by iage36 with SMTP id e36so506683iag.11 for ; Tue, 27 Mar 2012 13:23:45 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=x-forwarded-to:x-forwarded-for:delivered-to:received-spf:message-id :date:from:user-agent:mime-version:to:cc:subject:references :in-reply-to:content-type:x-originalarrivaltime:x-gm-message-state; bh=mhee2+e6/9UJT2zMkpSoDyX+wPFpx9UaHPozM3OyiFE=; b=FzD2QPomi0gvyO/IrpO9m5t7wWSoJCrx1I+c+nxixAxwDgFF+7LMje/ZYo082I+IYq 3tN1UmeJE4RjLM7KjgzNmTRxANuCYq+VqsnWva1xMuA6/qhTX434P5o1oN97yD6ueGQE DnJ0Uj7uwbmouuO8xnbE1sNC6ov0DkG8Oxs0ZlalzXfrep7eWKAdXhiBl4AaeRFA/TdU S8hLJo33F42O8XBTf+co27wvLkwZ+gjg2yh7wMFSq7LrWg5wOfjSm+m4YAPBPwx2h8Kx slduuRQ6ABbQ5owphBZj+FNhDBpk4l9JShwfwd0NXjeUe4k/m2GS8LfgyOfJ8hZvg/32 cLXQ== Received: by 10.43.134.199 with SMTP id id7mr16021000icc.21.1332879825132; Tue, 27 Mar 2012 13:23:45 -0700 (PDT) X-Forwarded-To: linaro-patchwork@canonical.com X-Forwarded-For: patch@linaro.org linaro-patchwork@canonical.com Delivered-To: patches@linaro.org Received: by 10.231.5.205 with SMTP id 13csp32156ibw; Tue, 27 Mar 2012 13:23:44 -0700 (PDT) Received: by 10.68.234.195 with SMTP id ug3mr66772776pbc.4.1332879823629; Tue, 27 Mar 2012 13:23:43 -0700 (PDT) Received: from relay1.mentorg.com (relay1.mentorg.com. [192.94.38.131]) by mx.google.com with ESMTPS id r7si1827293pbq.158.2012.03.27.13.23.43 (version=TLSv1/SSLv3 cipher=OTHER); Tue, 27 Mar 2012 13:23:43 -0700 (PDT) Received-SPF: neutral (google.com: 192.94.38.131 is neither permitted nor denied by best guess record for domain of Andrew_Stubbs@mentor.com) client-ip=192.94.38.131; Authentication-Results: mx.google.com; spf=neutral (google.com: 192.94.38.131 is neither permitted nor denied by best guess record for domain of Andrew_Stubbs@mentor.com) smtp.mail=Andrew_Stubbs@mentor.com Received: from svr-orw-fem-01.mgc.mentorg.com ([147.34.98.93]) by relay1.mentorg.com with esmtp id 1SCcvc-0002rQ-F8 from Andrew_Stubbs@mentor.com ; Tue, 27 Mar 2012 13:23:40 -0700 Received: from SVR-IES-FEM-01.mgc.mentorg.com ([137.202.0.104]) by svr-orw-fem-01.mgc.mentorg.com over TLS secured channel with Microsoft SMTPSVC(6.0.3790.4675); Tue, 27 Mar 2012 13:23:40 -0700 Received: from [172.30.15.35] (137.202.0.76) by SVR-IES-FEM-01.mgc.mentorg.com (137.202.0.104) with Microsoft SMTP Server id 14.1.289.1; Tue, 27 Mar 2012 21:23:38 +0100 Message-ID: <4F7221C5.1030607@codesourcery.com> Date: Tue, 27 Mar 2012 21:23:33 +0100 From: Andrew Stubbs User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:11.0) Gecko/20120310 Thunderbird/11.0 MIME-Version: 1.0 To: Richard Henderson CC: Richard Earnshaw , "gcc-patches@gcc.gnu.org" , "patches@linaro.org" Subject: Re: [PATCH][ARM] NEON DImode not References: <4F4E3AA5.1070804@codesourcery.com> <4F4E67B3.8050002@arm.com> <4F4F7226.6070809@codesourcery.com> <4F4FACC2.2050508@arm.com> <4F58DBFF.6080002@codesourcery.com> <4F58F454.2030803@redhat.com> In-Reply-To: <4F58F454.2030803@redhat.com> X-OriginalArrivalTime: 27 Mar 2012 20:23:40.0043 (UTC) FILETIME=[7F437DB0:01CD0C57] X-Gm-Message-State: ALoCoQm1AjZOwMkDknfu6et/dpzQ58mE+2zCAScSZesVoQp8vE7xTJxEUCkIYjr+Se/hnD4SIkA6 On 08/03/12 18:03, Richard Henderson wrote: > On 03/08/12 08:19, Andrew Stubbs wrote: >> + (set_attr "arch" "nota8,*,*,onlya8") >> + (set_attr_alternative "insn_enabled" >> + [(if_then_else (match_test "TARGET_NEON") >> + (const_string "yes") (const_string "no")) >> + (const_string "yes") >> + (const_string "yes") >> + (if_then_else (match_test "TARGET_NEON") >> + (const_string "yes") (const_string "no"))])] >> ) > > While this works, it might be better to add neon/neon_na8/neon_oa8 > alternatives to the arch attribute, and adjust arch_enabled to match. > > Obviously this opinion is non-binding; Richard E might have other plans... No reply from Richard so far ... so here's an update. OK now? Andrew 2012-03-27 Andrew Stubbs gcc/ * config/arm/arm.md (arch): Add neon_onlya8 and neon_nota8. (arch_enabled): Handle new arch types. (one_cmpldi2): Add NEON support. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 751997f..6669329 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -207,7 +207,7 @@ ; for ARM or Thumb-2 with arm_arch6, and nov6 for ARM without ; arm_arch6. This attribute is used to compute attribute "enabled", ; use type "any" to enable an alternative in all cases. -(define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,onlya8,nota8" +(define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,onlya8,neon_onlya8,nota8,neon_nota8" (const_string "any")) (define_attr "arch_enabled" "no,yes" @@ -246,8 +246,18 @@ (eq_attr "tune" "cortexa8")) (const_string "yes") + (and (eq_attr "arch" "neon_onlya8") + (eq_attr "tune" "cortexa8") + (match_test "TARGET_NEON")) + (const_string "yes") + (and (eq_attr "arch" "nota8") (not (eq_attr "tune" "cortexa8"))) + (const_string "yes") + + (and (eq_attr "arch" "neon_nota8") + (not (eq_attr "tune" "cortexa8")) + (match_test "TARGET_NEON")) (const_string "yes")] (const_string "no"))) @@ -4207,11 +4217,16 @@ "") (define_insn_and_split "one_cmpldi2" - [(set (match_operand:DI 0 "s_register_operand" "=&r,&r") - (not:DI (match_operand:DI 1 "s_register_operand" "0,r")))] + [(set (match_operand:DI 0 "s_register_operand" "=w,&r,&r,?w") + (not:DI (match_operand:DI 1 "s_register_operand" " w, 0, r, w")))] "TARGET_32BIT" - "#" - "TARGET_32BIT && reload_completed" + "@ + vmvn\t%P0, %P1 + # + # + vmvn\t%P0, %P1" + "TARGET_32BIT && reload_completed + && arm_general_register_operand (operands[0], DImode)" [(set (match_dup 0) (not:SI (match_dup 1))) (set (match_dup 2) (not:SI (match_dup 3)))] " @@ -4221,8 +4236,10 @@ operands[3] = gen_highpart (SImode, operands[1]); operands[1] = gen_lowpart (SImode, operands[1]); }" - [(set_attr "length" "8") - (set_attr "predicable" "yes")] + [(set_attr "length" "*,8,8,*") + (set_attr "predicable" "yes") + (set_attr "neon_type" "neon_int_1,*,*,neon_int_1") + (set_attr "arch" "neon_nota8,*,*,neon_onlya8")] ) (define_expand "one_cmplsi2"