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[v2,1/8] dt-bindings: clock: qcom: Allow VDD_GFX supply to GX

Message ID 20231220-sa8295p-gpu-v2-1-4763246b72c0@quicinc.com
State Superseded
Headers show
Series arm64: dts: qcom: sa8295p: Enable GPU | expand

Commit Message

Bjorn Andersson Dec. 22, 2023, 4:39 a.m. UTC
In some designs the SoC's VDD_GFX pads are supplied by an external
regulator, rather than a power-domain. Allow this to be described in the
GPU clock controller binding.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
 Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

Comments

Konrad Dybcio Dec. 29, 2023, 11:51 p.m. UTC | #1
On 27.12.2023 21:30, Bjorn Andersson wrote:
> On Fri, Dec 22, 2023 at 09:12:04AM +0100, Krzysztof Kozlowski wrote:
>> On 22/12/2023 05:39, Bjorn Andersson wrote:
>>> In some designs the SoC's VDD_GFX pads are supplied by an external
>>> regulator, rather than a power-domain. Allow this to be described in the
>>> GPU clock controller binding.
>>>
>>> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
>>> ---
>>>  Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 16 ++++++++++++++++
>>>  1 file changed, 16 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
>>> index f369fa34e00c..c0dd24c9dcb3 100644
>>> --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
>>> +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
>>> @@ -53,6 +53,9 @@ properties:
>>>    power-domains:
>>>      maxItems: 1
>>>  
>>> +  vdd-gfx-supply:
>>> +    description: Regulator supply for the VDD_GFX pads
>>> +
>>>    '#clock-cells':
>>>      const: 1
>>>  
>>> @@ -74,6 +77,19 @@ required:
>>>    - '#reset-cells'
>>>    - '#power-domain-cells'
>>>  
>>> +# Allow either power-domains or vdd-gfx-supply, not both
>>> +oneOf:
>>> +  - required:
>>> +      - power-domains
>>> +  - required:
>>> +      - vdd-gfx-supply
>>
>> This should be enough, assuming one of them is actually required. The
>> code. See also:
>> https://elixir.bootlin.com/linux/v5.17-rc2/source/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml#L91
>>
> 
> Yes, that would be the correct binding. But the majority of our
> DeviceTree source does not specify a power-domain for their gpucc.
> 
> While this should be corrected, it seem reasonable to leave this
> optional for now.
Moreover, I think it would be reasonable to add power-domains as
required in qcom,gcc.yaml. IIRC all "normal" (not q6) clock controllers
use at least CX+MX, with perhaps more hw-specific domains for some clocks
or GDSCs.

Konrad
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
index f369fa34e00c..c0dd24c9dcb3 100644
--- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml
@@ -53,6 +53,9 @@  properties:
   power-domains:
     maxItems: 1
 
+  vdd-gfx-supply:
+    description: Regulator supply for the VDD_GFX pads
+
   '#clock-cells':
     const: 1
 
@@ -74,6 +77,19 @@  required:
   - '#reset-cells'
   - '#power-domain-cells'
 
+# Allow either power-domains or vdd-gfx-supply, not both
+oneOf:
+  - required:
+      - power-domains
+  - required:
+      - vdd-gfx-supply
+  - not:
+      anyOf:
+        - required:
+            - power-domains
+        - required:
+            - vdd-gfx-supply
+
 additionalProperties: false
 
 examples: