[edk2,2/2] Platforms/ARM/FVP: limit VA range to 36 bits

Message ID 1473408939-18044-2-git-send-email-ard.biesheuvel@linaro.org
State New
Headers show

Commit Message

Ard Biesheuvel Sept. 9, 2016, 8:15 a.m.
The FVP model has up to 8 GB of memory (on the Base model), where the
top 6GB starts at 0x8_8000_0000, and all other memory regions of interest
live below that. This means we can cover the whole VA space with 36-bits
worth of VA.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>

---
 Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 3 +++
 1 file changed, 3 insertions(+)

-- 
2.7.4

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Comments

Leif Lindholm Sept. 13, 2016, 10:43 a.m. | #1
On Fri, Sep 09, 2016 at 09:15:39AM +0100, Ard Biesheuvel wrote:
> The FVP model has up to 8 GB of memory (on the Base model), where the

> top 6GB starts at 0x8_8000_0000, and all other memory regions of interest

> live below that. This means we can cover the whole VA space with 36-bits

> worth of VA.

> 

> Contributed-under: TianoCore Contribution Agreement 1.0

> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>


Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>


> ---

>  Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc | 3 +++

>  1 file changed, 3 insertions(+)

> 

> diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc

> index 3d8e0cfbb57e..60df45dca276 100644

> --- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc

> +++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc

> @@ -175,6 +175,9 @@

>    # Set tick frequency value to 100Mhz

>    gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|100000000

>  

> +  # the entire FVP address space can be covered by 36 bit VAs

> +  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|36

> +

>  [PcdsDynamicDefault.common]

>    #

>    # The size of a dynamic PCD of the (VOID*) type can not be increased at run

> -- 

> 2.7.4

> 

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Patch

diff --git a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc
index 3d8e0cfbb57e..60df45dca276 100644
--- a/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc
+++ b/Platforms/ARM/VExpress/ArmVExpress-FVP-AArch64.dsc
@@ -175,6 +175,9 @@ 
   # Set tick frequency value to 100Mhz
   gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|100000000
 
+  # the entire FVP address space can be covered by 36 bit VAs
+  gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize|36
+
 [PcdsDynamicDefault.common]
   #
   # The size of a dynamic PCD of the (VOID*) type can not be increased at run