diff mbox series

[v3,30/33] target/arm: Enable TARGET_PAGE_BITS_VARY for AArch64 user-only

Message ID 20240102015808.132373-31-richard.henderson@linaro.org
State Superseded
Headers show
Series linux-user: Improve host and guest page size handling | expand

Commit Message

Richard Henderson Jan. 2, 2024, 1:58 a.m. UTC 
Since aarch64 binaries are generally built for multiple
page sizes, it is trivial to allow the page size to vary.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/cpu-param.h |  6 ++++-
 target/arm/cpu.c       | 51 ++++++++++++++++++++++++------------------
 2 files changed, 34 insertions(+), 23 deletions(-)

Comments

Pierrick Bouvier Jan. 8, 2024, 11:02 a.m. UTC | #1 
On 1/2/24 05:58, Richard Henderson wrote:
> Since aarch64 binaries are generally built for multiple
> page sizes, it is trivial to allow the page size to vary.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/arm/cpu-param.h |  6 ++++-
>   target/arm/cpu.c       | 51 ++++++++++++++++++++++++------------------
>   2 files changed, 34 insertions(+), 23 deletions(-)
> 
> diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h
> index f9b462a98f..da3243ab21 100644
> --- a/target/arm/cpu-param.h
> +++ b/target/arm/cpu-param.h
> @@ -19,9 +19,13 @@
>   #endif
>   
>   #ifdef CONFIG_USER_ONLY
> -#define TARGET_PAGE_BITS 12
>   # ifdef TARGET_AARCH64
>   #  define TARGET_TAGGED_ADDRESSES
> +/* Allow user-only to vary page size from 4k */
> +#  define TARGET_PAGE_BITS_VARY
> +#  define TARGET_PAGE_BITS_MIN  12
> +# else
> +#  define TARGET_PAGE_BITS 12
>   # endif
>   #else
>   /*
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index 650e09b29c..55c2888f2c 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -1788,7 +1788,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
>       ARMCPU *cpu = ARM_CPU(dev);
>       ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev);
>       CPUARMState *env = &cpu->env;
> -    int pagebits;
>       Error *local_err = NULL;
>   
>       /* Use pc-relative instructions in system-mode */
> @@ -2079,28 +2078,36 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
>              !cpu_isar_feature(aa32_vfp_simd, cpu) ||
>              !arm_feature(env, ARM_FEATURE_XSCALE));
>   
> -    if (arm_feature(env, ARM_FEATURE_V7) &&
> -        !arm_feature(env, ARM_FEATURE_M) &&
> -        !arm_feature(env, ARM_FEATURE_PMSA)) {
> -        /* v7VMSA drops support for the old ARMv5 tiny pages, so we
> -         * can use 4K pages.
> -         */
> -        pagebits = 12;
> -    } else {
> -        /* For CPUs which might have tiny 1K pages, or which have an
> -         * MPU and might have small region sizes, stick with 1K pages.
> -         */
> -        pagebits = 10;
> -    }
> -    if (!set_preferred_target_page_bits(pagebits)) {
> -        /* This can only ever happen for hotplugging a CPU, or if
> -         * the board code incorrectly creates a CPU which it has
> -         * promised via minimum_page_size that it will not.
> -         */
> -        error_setg(errp, "This CPU requires a smaller page size than the "
> -                   "system is using");
> -        return;
> +#ifndef CONFIG_USER_ONLY
> +    {
> +        int pagebits;
> +        if (arm_feature(env, ARM_FEATURE_V7) &&
> +            !arm_feature(env, ARM_FEATURE_M) &&
> +            !arm_feature(env, ARM_FEATURE_PMSA)) {
> +            /*
> +             * v7VMSA drops support for the old ARMv5 tiny pages,
> +             * so we can use 4K pages.
> +             */
> +            pagebits = 12;
> +        } else {
> +            /*
> +             * For CPUs which might have tiny 1K pages, or which have an
> +             * MPU and might have small region sizes, stick with 1K pages.
> +             */
> +            pagebits = 10;
> +        }
> +        if (!set_preferred_target_page_bits(pagebits)) {
> +            /*
> +             * This can only ever happen for hotplugging a CPU, or if
> +             * the board code incorrectly creates a CPU which it has
> +             * promised via minimum_page_size that it will not.
> +             */
> +            error_setg(errp, "This CPU requires a smaller page size "
> +                       "than the system is using");
> +            return;
> +        }
>       }
> +#endif
>   
>       /* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it.
>        * We don't support setting cluster ID ([16..23]) (known as Aff2

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
diff mbox series

Patch

diff --git a/target/arm/cpu-param.h b/target/arm/cpu-param.h
index f9b462a98f..da3243ab21 100644
--- a/target/arm/cpu-param.h
+++ b/target/arm/cpu-param.h
@@ -19,9 +19,13 @@ 
 #endif
 
 #ifdef CONFIG_USER_ONLY
-#define TARGET_PAGE_BITS 12
 # ifdef TARGET_AARCH64
 #  define TARGET_TAGGED_ADDRESSES
+/* Allow user-only to vary page size from 4k */
+#  define TARGET_PAGE_BITS_VARY
+#  define TARGET_PAGE_BITS_MIN  12
+# else
+#  define TARGET_PAGE_BITS 12
 # endif
 #else
 /*
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 650e09b29c..55c2888f2c 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1788,7 +1788,6 @@  static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
     ARMCPU *cpu = ARM_CPU(dev);
     ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev);
     CPUARMState *env = &cpu->env;
-    int pagebits;
     Error *local_err = NULL;
 
     /* Use pc-relative instructions in system-mode */
@@ -2079,28 +2078,36 @@  static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
            !cpu_isar_feature(aa32_vfp_simd, cpu) ||
            !arm_feature(env, ARM_FEATURE_XSCALE));
 
-    if (arm_feature(env, ARM_FEATURE_V7) &&
-        !arm_feature(env, ARM_FEATURE_M) &&
-        !arm_feature(env, ARM_FEATURE_PMSA)) {
-        /* v7VMSA drops support for the old ARMv5 tiny pages, so we
-         * can use 4K pages.
-         */
-        pagebits = 12;
-    } else {
-        /* For CPUs which might have tiny 1K pages, or which have an
-         * MPU and might have small region sizes, stick with 1K pages.
-         */
-        pagebits = 10;
-    }
-    if (!set_preferred_target_page_bits(pagebits)) {
-        /* This can only ever happen for hotplugging a CPU, or if
-         * the board code incorrectly creates a CPU which it has
-         * promised via minimum_page_size that it will not.
-         */
-        error_setg(errp, "This CPU requires a smaller page size than the "
-                   "system is using");
-        return;
+#ifndef CONFIG_USER_ONLY
+    {
+        int pagebits;
+        if (arm_feature(env, ARM_FEATURE_V7) &&
+            !arm_feature(env, ARM_FEATURE_M) &&
+            !arm_feature(env, ARM_FEATURE_PMSA)) {
+            /*
+             * v7VMSA drops support for the old ARMv5 tiny pages,
+             * so we can use 4K pages.
+             */
+            pagebits = 12;
+        } else {
+            /*
+             * For CPUs which might have tiny 1K pages, or which have an
+             * MPU and might have small region sizes, stick with 1K pages.
+             */
+            pagebits = 10;
+        }
+        if (!set_preferred_target_page_bits(pagebits)) {
+            /*
+             * This can only ever happen for hotplugging a CPU, or if
+             * the board code incorrectly creates a CPU which it has
+             * promised via minimum_page_size that it will not.
+             */
+            error_setg(errp, "This CPU requires a smaller page size "
+                       "than the system is using");
+            return;
+        }
     }
+#endif
 
     /* This cpu-id-to-MPIDR affinity is used only for TCG; KVM will override it.
      * We don't support setting cluster ID ([16..23]) (known as Aff2