diff mbox series

[v3,2/5] gpu: host1x: Add Tegra SE to SID table

Message ID 20240109091708.66977-3-akhilrajeev@nvidia.com
State Superseded
Headers show
Series Add Tegra Security Engine driver | expand

Commit Message

Akhil R Jan. 9, 2024, 9:17 a.m. UTC
Add Tegra Security Engine details to the SID table in host1x driver.
These will be referred when registering the SE as host1x device.

Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
---
 drivers/gpu/host1x/dev.c | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

Comments

Mikko Perttunen Jan. 16, 2024, 6:36 a.m. UTC | #1
On 1/9/24 18:17, Akhil R wrote:
> Add Tegra Security Engine details to the SID table in host1x driver.
> These will be referred when registering the SE as host1x device.

Technically, these entries are required to be in place any time we want 
to configure SE's stream ID. Register writes to stream ID registers fail 
otherwise.

> 
> Signed-off-by: Akhil R <akhilrajeev@nvidia.com>
> ---
>   drivers/gpu/host1x/dev.c | 24 ++++++++++++++++++++++++
>   1 file changed, 24 insertions(+)
> 
> diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
> index 42fd504abbcd..b564c7042235 100644
> --- a/drivers/gpu/host1x/dev.c
> +++ b/drivers/gpu/host1x/dev.c
> @@ -214,6 +214,30 @@ static const struct host1x_info host1x07_info = {
>    * and firmware stream ID in the MMIO path table.
>    */
>   static const struct host1x_sid_entry tegra234_sid_table[] = {
> +	{
> +		/* SE2 MMIO */
> +		.base = 0x1658,
> +		.offset = 0x90,
> +		.limit = 0x90
> +	},
> +	{
> +		/* SE4 MMIO */
> +		.base = 0x1660,
> +		.offset = 0x90,
> +		.limit = 0x90
> +	},
> +	{
> +		/* SE2 channel */
> +		.base = 0x1738,
> +		.offset = 0x90,
> +		.limit = 0x90
> +	},
> +	{
> +		/* SE4 channel */
> +		.base = 0x1740,
> +		.offset = 0x90,
> +		.limit = 0x90
> +	},
>   	{
>   		/* VIC channel */
>   		.base = 0x17b8,

With the commit message slightly adjusted,

Acked-by: Mikko Perttunen <mperttunen@nvidia.com>
diff mbox series

Patch

diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
index 42fd504abbcd..b564c7042235 100644
--- a/drivers/gpu/host1x/dev.c
+++ b/drivers/gpu/host1x/dev.c
@@ -214,6 +214,30 @@  static const struct host1x_info host1x07_info = {
  * and firmware stream ID in the MMIO path table.
  */
 static const struct host1x_sid_entry tegra234_sid_table[] = {
+	{
+		/* SE2 MMIO */
+		.base = 0x1658,
+		.offset = 0x90,
+		.limit = 0x90
+	},
+	{
+		/* SE4 MMIO */
+		.base = 0x1660,
+		.offset = 0x90,
+		.limit = 0x90
+	},
+	{
+		/* SE2 channel */
+		.base = 0x1738,
+		.offset = 0x90,
+		.limit = 0x90
+	},
+	{
+		/* SE4 channel */
+		.base = 0x1740,
+		.offset = 0x90,
+		.limit = 0x90
+	},
 	{
 		/* VIC channel */
 		.base = 0x17b8,