| Message ID | 1705486629-25592-1-git-send-email-mantas@8devices.com |
|---|---|
| State | Accepted |
| Commit | fd712118aa1aa758da1fd1546b3f8a1b00e42cbc |
| Headers | show |
| Series | clk: qcom: gcc-ipq6018: add qdss_at clock needed for wifi operation | expand |
On 1/17/24 11:17, Mantas Pucka wrote: > Without it system hangs upon wifi firmware load. Bindings already exist > for it, so add it based on vendor code. > > Signed-off-by: Mantas Pucka <mantas@8devices.com> > --- > drivers/clk/qcom/gcc-ipq6018.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/clk/qcom/gcc-ipq6018.c b/drivers/clk/qcom/gcc-ipq6018.c > index b366912cd648..7cdaf7751566 100644 > --- a/drivers/clk/qcom/gcc-ipq6018.c > +++ b/drivers/clk/qcom/gcc-ipq6018.c > @@ -3522,6 +3522,22 @@ static struct clk_branch gcc_prng_ahb_clk = { > }, > }; > > +static struct clk_branch gcc_qdss_at_clk = { Hm, QDSS stands for something something Qualcomm Debug SubSystem if I recall correctly, so coresight and friends.. Are you sure it's necessary? > + .halt_reg = 0x29024, > + .clkr = { > + .enable_reg = 0x29024, > + .enable_mask = BIT(0), > + .hw.init = &(struct clk_init_data){ > + .name = "gcc_qdss_at_clk", > + .parent_hws = (const struct clk_hw *[]){ > + &qdss_at_clk_src.clkr.hw }, > + .num_parents = 1, > + .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, Does it need to be enabled 24/7, or can it be attached to the wifi device? Konrad
On 2024-01-18 19:48, Konrad Dybcio wrote: > On 1/17/24 11:17, Mantas Pucka wrote: >> Without it system hangs upon wifi firmware load. Bindings already exist >> for it, so add it based on vendor code. >> >> Signed-off-by: Mantas Pucka <mantas@8devices.com> >> --- >> drivers/clk/qcom/gcc-ipq6018.c | 17 +++++++++++++++++ >> 1 file changed, 17 insertions(+) >> >> diff --git a/drivers/clk/qcom/gcc-ipq6018.c >> b/drivers/clk/qcom/gcc-ipq6018.c >> index b366912cd648..7cdaf7751566 100644 >> --- a/drivers/clk/qcom/gcc-ipq6018.c >> +++ b/drivers/clk/qcom/gcc-ipq6018.c >> @@ -3522,6 +3522,22 @@ static struct clk_branch gcc_prng_ahb_clk = { >> }, >> }; >> +static struct clk_branch gcc_qdss_at_clk = { > > Hm, QDSS stands for something something Qualcomm Debug SubSystem > if I recall correctly, so coresight and friends.. Are you sure > it's necessary? > That's rather strange dependency, I agree. Yet, even manually disabling this clock before wifi driver load would cause failure. On the other hand, disabling it while wifi is already operational seems to cause no trouble. So it follows that clock is only required during wifi startup. Since wifi FW loading is done through SCM call, maybe this could be a Qcom TZ firmware requirement. >> + .halt_reg = 0x29024, >> + .clkr = { >> + .enable_reg = 0x29024, >> + .enable_mask = BIT(0), >> + .hw.init = &(struct clk_init_data){ >> + .name = "gcc_qdss_at_clk", >> + .parent_hws = (const struct clk_hw *[]){ >> + &qdss_at_clk_src.clkr.hw }, >> + .num_parents = 1, >> + .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, > > Does it need to be enabled 24/7, or can it be attached to the wifi > device? > In fact, attaching to wifi remoteproc seem to work fine. I'll send v2 without CLK_IS_CRITICAL if all else is OK. Mantas
diff --git a/drivers/clk/qcom/gcc-ipq6018.c b/drivers/clk/qcom/gcc-ipq6018.c index b366912cd648..7cdaf7751566 100644 --- a/drivers/clk/qcom/gcc-ipq6018.c +++ b/drivers/clk/qcom/gcc-ipq6018.c @@ -3522,6 +3522,22 @@ static struct clk_branch gcc_prng_ahb_clk = { }, }; +static struct clk_branch gcc_qdss_at_clk = { + .halt_reg = 0x29024, + .clkr = { + .enable_reg = 0x29024, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "gcc_qdss_at_clk", + .parent_hws = (const struct clk_hw *[]){ + &qdss_at_clk_src.clkr.hw }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_branch gcc_qdss_dap_clk = { .halt_reg = 0x29084, .clkr = { @@ -4361,6 +4377,7 @@ static struct clk_regmap *gcc_ipq6018_clks[] = { [GCC_SYS_NOC_PCIE0_AXI_CLK] = &gcc_sys_noc_pcie0_axi_clk.clkr, [GCC_PCIE0_PIPE_CLK] = &gcc_pcie0_pipe_clk.clkr, [GCC_PRNG_AHB_CLK] = &gcc_prng_ahb_clk.clkr, + [GCC_QDSS_AT_CLK] = &gcc_qdss_at_clk.clkr, [GCC_QDSS_DAP_CLK] = &gcc_qdss_dap_clk.clkr, [GCC_QPIC_AHB_CLK] = &gcc_qpic_ahb_clk.clkr, [GCC_QPIC_CLK] = &gcc_qpic_clk.clkr,
Without it system hangs upon wifi firmware load. Bindings already exist for it, so add it based on vendor code. Signed-off-by: Mantas Pucka <mantas@8devices.com> --- drivers/clk/qcom/gcc-ipq6018.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)