diff mbox series

[RFC,4/7] hw/ide/sii3112: Configure IDE bus IRQs after realization

Message ID 20240209123226.32576-5-philmd@linaro.org
State New
Headers show
Series hw/qdev: Split 'wiring' phase from 'realize' | expand

Commit Message

Philippe Mathieu-Daudé Feb. 9, 2024, 12:32 p.m. UTC 
We shouldn't call qdev_get_gpio_in() on unrealized devices.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
Ideally we should rework the current IDE bus model to really
use QOM and not globals. Left for later.
---
 hw/ide/sii3112.c | 10 ++++++++++
 1 file changed, 10 insertions(+)
diff mbox series

Patch

diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c
index 63dc4a0494..8b6e931f27 100644
--- a/hw/ide/sii3112.c
+++ b/hw/ide/sii3112.c
@@ -282,6 +282,15 @@  static void sii3112_pci_realize(PCIDevice *dev, Error **errp)
     qdev_init_gpio_in(ds, sii3112_set_irq, 2);
     for (i = 0; i < 2; i++) {
         ide_bus_init(&s->bus[i], sizeof(s->bus[i]), ds, i, 1);
+    }
+}
+
+static void sii3112_pci_wire(DeviceState *dev)
+{
+    PCIIDEState *s = PCI_IDE(dev);
+    DeviceState *ds = DEVICE(dev);
+
+    for (unsigned i = 0; i < 2; i++) {
         ide_bus_init_output_irq(&s->bus[i], qdev_get_gpio_in(ds, i));
 
         bmdma_init(&s->bus[i], &s->bmdma[i], s);
@@ -299,6 +308,7 @@  static void sii3112_pci_class_init(ObjectClass *klass, void *data)
     pd->class_id = PCI_CLASS_STORAGE_RAID;
     pd->revision = 1;
     pd->realize = sii3112_pci_realize;
+    dc->wire = sii3112_pci_wire;
     dc->reset = sii3112_reset;
     dc->desc = "SiI3112A SATA controller";
     set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);