i.mx: i.mx6x: NO_MUX_I/NO_PAD_I not set correctly

Message ID 1334143082-7876-1-git-send-email-jason.hui@linaro.org
State Accepted
Commit 0d952e5d2eef9320338a87007959ce0d80a264e3
Headers show

Commit Message

Jason Hui April 11, 2012, 11:18 a.m.
If one PAD does not have mux or pad config register, we need
set the NO_MUX_I/NO_PAD_I to 0, the old value is not correct

Signed-off-by: Jason Liu <jason.hui@linaro.org>
CC: Stefano Babic <sbabic@denx.de>
---
 arch/arm/include/asm/arch-mx6/mx6x_pins.h |    4 ++--
 1 files changed, 2 insertions(+), 2 deletions(-)

Patch

diff --git a/arch/arm/include/asm/arch-mx6/mx6x_pins.h b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
index afaa068..9979651 100644
--- a/arch/arm/include/asm/arch-mx6/mx6x_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6x_pins.h
@@ -48,8 +48,8 @@ 
 #define PAD_CTL_SRE_FAST	(1 << 0)
 #define PAD_CTL_SRE_SLOW	(0 << 0)
 
-#define NO_MUX_I		0x3FF
-#define NO_PAD_I		0x7FF
+#define NO_MUX_I                0
+#define NO_PAD_I                0
 
 enum {
 	MX6Q_PAD_SD2_DAT1__USDHC2_DAT1		= IOMUX_PAD(0x0360, 0x004C, 0, 0x0000, 0, 0),