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arm64: dts: qcom: sm6350: Add interconnect for MDSS

Message ID 20240216-sm6350-interconnect-v1-1-9d55667c06ca@fairphone.com
State Accepted
Commit fc48bb313513d140026e4d0c441f290ab9c08577
Headers show
Series arm64: dts: qcom: sm6350: Add interconnect for MDSS | expand

Commit Message

Luca Weiss Feb. 16, 2024, 1:11 p.m. UTC
Add the definition for the interconnect used in the display subsystem.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
 arch/arm64/boot/dts/qcom/sm6350.dtsi | 7 +++++++
 1 file changed, 7 insertions(+)


---
base-commit: 84c11540697ba996a7f55b16565945b52db3019e
change-id: 20240124-sm6350-interconnect-a9c2857a5594

Best regards,
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/qcom/sm6350.dtsi b/arch/arm64/boot/dts/qcom/sm6350.dtsi
index 5e8c8896ba66..ef4d847c4acf 100644
--- a/arch/arm64/boot/dts/qcom/sm6350.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm6350.dtsi
@@ -1973,6 +1973,13 @@  mdss: display-subsystem@ae00000 {
 			interrupt-controller;
 			#interrupt-cells = <1>;
 
+			interconnects = <&mmss_noc MASTER_MDP_PORT0 QCOM_ICC_TAG_ALWAYS
+					 &clk_virt SLAVE_EBI_CH0 QCOM_ICC_TAG_ALWAYS>,
+					<&gem_noc MASTER_AMPSS_M0 QCOM_ICC_TAG_ACTIVE_ONLY
+					 &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>;
+			interconnect-names = "mdp0-mem",
+					     "cpu-cfg";
+
 			clocks = <&gcc GCC_DISP_AHB_CLK>,
 				 <&gcc GCC_DISP_AXI_CLK>,
 				 <&dispcc DISP_CC_MDSS_MDP_CLK>;