From patchwork Thu Oct 13 02:00:15 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gary guo X-Patchwork-Id: 77600 Delivered-To: patch@linaro.org Received: by 10.140.97.247 with SMTP id m110csp15175qge; Wed, 12 Oct 2016 19:02:15 -0700 (PDT) X-Received: by 10.55.164.141 with SMTP id n135mr4023054qke.222.1476324135648; Wed, 12 Oct 2016 19:02:15 -0700 (PDT) Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id m32si5229065qkh.221.2016.10.12.19.02.15; Wed, 12 Oct 2016 19:02:15 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 46D6761741; Thu, 13 Oct 2016 02:02:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2 autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id AD2AA61757; Thu, 13 Oct 2016 02:01:09 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id D05C261755; Thu, 13 Oct 2016 02:01:04 +0000 (UTC) Received: from mail-pa0-f48.google.com (mail-pa0-f48.google.com [209.85.220.48]) by lists.linaro.org (Postfix) with ESMTPS id 78C1B61741 for ; Thu, 13 Oct 2016 02:00:47 +0000 (UTC) Received: by mail-pa0-f48.google.com with SMTP id rz1so33813061pab.1 for ; Wed, 12 Oct 2016 19:00:47 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=o9Za3Ob7mIR3pfGbTBCGtkITIvhbjzGsqQIke6giFA8=; b=kMpk5ZRDS06zNSHWLADENmvakx5LufuqBEtsJ43NL0bz8D6/eMxIG87f3FDkGzNfBd B6hnOF8OvyNm7p/3l4cLBDmFRkW3dhLGAkPnNN2Fk8kl4hb6a0MvyQpXfICY39Yvjy3W JRWiM+X2rEwLhlwa5mlxQ8CBuP498203H/53DggtORN4eEFph9kqdUEAW9glrGkR2hy8 TUj7h2lcDdNZMotbrudGfifC7TCUEZwzjuiS3SzQsDAubj8JCrgFdvjrc3+f0iFeUeYr pezm0SlKSHbRfXbk86w9LiUknsxSvhp27MtlQepdY1/5ksKbCyR7cE2vVoCuGVCgjR3I AYhg== X-Gm-Message-State: AA6/9RlCyHnEgUBmkFm7aLc/o34rbFRJA8IQIJIaGOrRGA4/xfo02EvgbKwtBk76Rdka0Dz1F9U= X-Received: by 10.66.84.161 with SMTP id a1mr5202268paz.195.1476324046789; Wed, 12 Oct 2016 19:00:46 -0700 (PDT) Received: from localhost.localdomain ([119.145.15.121]) by smtp.gmail.com with ESMTPSA id sv8sm14732756pab.18.2016.10.12.19.00.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 12 Oct 2016 19:00:46 -0700 (PDT) From: Heyi Guo To: linaro-uefi@lists.linaro.org Date: Thu, 13 Oct 2016 10:00:15 +0800 Message-Id: <1476324020-57155-6-git-send-email-heyi.guo@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1476324020-57155-1-git-send-email-heyi.guo@linaro.org> References: <1476324020-57155-1-git-send-email-heyi.guo@linaro.org> Subject: [Linaro-uefi] [PATCH 06/11] Hisilicon/I2CLib: Extend to support Hi1616 X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" Hi1616 has 10 I2C ports and the IP of I2C controller is DW v2, which requires to write BIT9 for the last transfer. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo --- Chips/Hisilicon/Include/Library/I2CLib.h | 2 +- Chips/Hisilicon/Library/I2CLib/I2CLib.c | 54 +++++++++++--------------------- 2 files changed, 19 insertions(+), 37 deletions(-) diff --git a/Chips/Hisilicon/Include/Library/I2CLib.h b/Chips/Hisilicon/Include/Library/I2CLib.h index c3597f6..36e9f5f 100644 --- a/Chips/Hisilicon/Include/Library/I2CLib.h +++ b/Chips/Hisilicon/Include/Library/I2CLib.h @@ -33,7 +33,7 @@ typedef enum { }SPEED_MODE; -#define I2C_PORT_MAX 9 +#define I2C_PORT_MAX 10 diff --git a/Chips/Hisilicon/Library/I2CLib/I2CLib.c b/Chips/Hisilicon/Library/I2CLib/I2CLib.c index 087a4ba..f4910fb 100644 --- a/Chips/Hisilicon/Library/I2CLib/I2CLib.c +++ b/Chips/Hisilicon/Library/I2CLib/I2CLib.c @@ -360,7 +360,14 @@ I2CWrite(I2C_DEVICE *I2cInfo, UINT16 InfoOffset, UINT32 ulLength, UINT8 *pBuf) ulFifo = I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); } - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, *pBuf++); + if (Idx < ulLength - 1) + { + I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, (*pBuf++)); + } + else + { + I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, (*pBuf++) | 0x200); + } } ulFifo = I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); @@ -386,13 +393,10 @@ EFI_STATUS EFIAPI I2CRead(I2C_DEVICE *I2cInfo, UINT16 InfoOffset,UINT32 ulRxLen,UINT8 *pBuf) { - UINT32 ulCnt; - UINT16 usTotalLen = 0; UINT32 ulFifo; UINT32 ulTimes = 0; UINT8 I2CWAddr[2]; EFI_STATUS Status; - UINT32 BytesLeft; UINT32 Idx = 0; UINTN Base; @@ -441,42 +445,17 @@ I2CRead(I2C_DEVICE *I2cInfo, UINT16 InfoOffset,UINT32 ulRxLen,UINT8 *pBuf) ulFifo = I2C_GetTxStatus(I2cInfo->Socket,I2cInfo->Port); } - usTotalLen = ulRxLen; - BytesLeft = usTotalLen; - - while(BytesLeft >= I2C_DRV_ONCE_READ_BYTES_NUM){ - - - for(ulCnt = 0; ulCnt < I2C_DRV_ONCE_READ_BYTES_NUM; ulCnt++) { + while(ulRxLen > 0) + { + if (ulRxLen > 1) + { I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, I2C_READ_SIGNAL); } - - - for(ulCnt = 0; ulCnt < I2C_DRV_ONCE_READ_BYTES_NUM; ulCnt++) { - ulTimes = 0; - do { - I2C_Delay(2); - - while(++ulTimes > I2C_READ_TIMEOUT) { - (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); - return EFI_TIMEOUT; - } - ulFifo = I2C_GetRxStatus(I2cInfo->Socket,I2cInfo->Port); - - }while(0 == ulFifo); - - I2C_REG_READ(Base + I2C_DATA_CMD_OFFSET, pBuf[Idx++]); + else + { + I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, I2C_READ_SIGNAL | 0x200); } - BytesLeft -= I2C_DRV_ONCE_READ_BYTES_NUM; - } - - for(ulCnt = 0; ulCnt < BytesLeft; ulCnt++) { - I2C_REG_WRITE(Base + I2C_DATA_CMD_OFFSET, I2C_READ_SIGNAL); - } - - - for(ulCnt = 0; ulCnt < BytesLeft; ulCnt++) { ulTimes = 0; do { I2C_Delay(2); @@ -489,7 +468,10 @@ I2CRead(I2C_DEVICE *I2cInfo, UINT16 InfoOffset,UINT32 ulRxLen,UINT8 *pBuf) }while(0 == ulFifo); I2C_REG_READ(Base + I2C_DATA_CMD_OFFSET, pBuf[Idx++]); + + ulRxLen --; } + (VOID)I2C_Disable(I2cInfo->Socket, I2cInfo->Port); return EFI_SUCCESS;