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[PULL,4/9] target/hppa: ldcw,s uses static shift of 3

Message ID 20240320003223.554145-5-richard.henderson@linaro.org
State Accepted
Commit c3ea1996a14d5dbbedb3f9036f7ebec4395dc889
Headers show
Series [PULL,1/9] target/hppa: Fix assemble_16 insns for wide mode | expand

Commit Message

Richard Henderson March 20, 2024, 12:32 a.m. UTC 
From: Sven Schnelle <svens@stackframe.org>

Fixes: 96d6407f363 ("target-hppa: Implement loads and stores")
Signed-off-by: Sven Schnelle <svens@stackframe.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240319161921.487080-2-svens@stackframe.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/hppa/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index be0b0494d0..47c6db78c7 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -3135,7 +3135,7 @@  static bool trans_ldc(DisasContext *ctx, arg_ldst *a)
         dest = dest_gpr(ctx, a->t);
     }
 
-    form_gva(ctx, &addr, &ofs, a->b, a->x, a->scale ? a->size : 0,
+    form_gva(ctx, &addr, &ofs, a->b, a->x, a->scale ? 3 : 0,
              a->disp, a->sp, a->m, MMU_DISABLED(ctx));
 
     /*