diff mbox series

[RFC,PATCH-for-9.1,17/29] hw/i386/pc: Inline gigabyte_align()

Message ID 20240328155439.58719-18-philmd@linaro.org
State New
Headers show
Series [RFC,PATCH-for-9.1,01/29] hw/i386/pc: Declare CPU QOM types using DEFINE_TYPES() macro | expand

Commit Message

Philippe Mathieu-Daudé March 28, 2024, 3:54 p.m. UTC
All PCI-based machines have the gigabyte_align field
set to %true. Simplify by using an inlined helper
checking whether the machine is PCI-based or not.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 include/hw/i386/pc.h |  9 ---------
 hw/i386/pc.c         |  1 -
 hw/i386/pc_piix.c    | 16 +++++++++++++---
 3 files changed, 13 insertions(+), 13 deletions(-)
diff mbox series

Patch

diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 2db2aa03d3..758dd5f29b 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -76,14 +76,6 @@  typedef struct PcPciMachineState {
 
 /**
  * PCMachineClass:
- *
- * Compat fields:
- *
- * @gigabyte_align: Make sure that guest addresses aligned at
- *                  1Gbyte boundaries get mapped to host
- *                  addresses aligned at 1Gbyte boundaries. This
- *                  way we can use 1GByte pages in the host.
- *
  */
 typedef struct PCMachineClass {
     X86MachineClass parent_class;
@@ -99,7 +91,6 @@  typedef struct PCMachineClass {
     SmbiosEntryPointType default_smbios_ep_type;
 
     /* RAM / address space compat: */
-    bool gigabyte_align;
     bool has_reserved_memory;
     bool broken_reserved_end;
     bool enforce_amd_1tb_hole;
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index dd44df0470..093a7c35f7 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1752,7 +1752,6 @@  static void pc_machine_class_init(ObjectClass *oc, void *data)
     HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(oc);
 
     pcmc->smbios_defaults = true;
-    pcmc->gigabyte_align = true;
     pcmc->has_reserved_memory = true;
     pcmc->enforce_amd_1tb_hole = true;
     pcmc->pvh_enabled = true;
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 2043a7022a..0bc14da768 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -99,6 +99,17 @@  static void piix_intx_routing_notifier_xen(PCIDevice *dev)
     }
 }
 
+/*
+ * gigabyte_align: Make sure that guest addresses aligned at
+ *                 1Gbyte boundaries get mapped to host
+ *                 addresses aligned at 1Gbyte boundaries.
+ *                 This way we can use 1GByte pages in the host.
+ */
+static bool gigabyte_align(PCMachineState *pcms)
+{
+    return pc_machine_is_pci_enabled(pcms);
+}
+
 /* PC hardware initialisation */
 static void pc_init1(MachineState *machine, const char *pci_type)
 {
@@ -130,7 +141,7 @@  static void pc_init1(MachineState *machine, const char *pci_type)
      *  - Then, to gigabyte align the memory, we move the split to 3G
      *    (lowmem = 0xc0000000).  But only in case we have to split in
      *    the first place, i.e. ram_size is larger than (traditional)
-     *    lowmem.  And for new machine types (gigabyte_align = true)
+     *    lowmem.  And for new machine types (gigabyte_align() = true)
      *    only, for live migration compatibility reasons.
      *
      *  - Next the max-ram-below-4g option was added, which allowed to
@@ -160,7 +171,7 @@  static void pc_init1(MachineState *machine, const char *pci_type)
         }
         lowmem = pcms->max_ram_below_4g;
         if (machine->ram_size >= pcms->max_ram_below_4g) {
-            if (pcmc->gigabyte_align) {
+            if (gigabyte_align(pcms)) {
                 if (lowmem > 0xc0000000) {
                     lowmem = 0xc0000000;
                 }
@@ -818,7 +829,6 @@  static void isapc_machine_options(MachineClass *m)
     m->option_rom_has_mr = true;
     m->rom_file_has_mr = false;
     pcmc->smbios_defaults = false;
-    pcmc->gigabyte_align = false;
     pcmc->smbios_legacy_mode = true;
     pcmc->has_reserved_memory = false;
     m->default_nic = "ne2k_isa";