[3/5] Documentation: synopsys-dw-mshc: add binding for fifo quirks

Message ID 1477300316-1420-4-git-send-email-jun.nie@linaro.org
State New
Headers show

Commit Message

Jun Nie Oct. 24, 2016, 9:11 a.m.
Add fifo-addr-override property and fifo-watermark-quirk property to
synopsys-dw-mshc bindings. It is intended to provide workarounds to
support more SoCs that break current assumption.

See Documentation/devicetree/bindings/reset/reset.txt for details.

Signed-off-by: Jun Nie <jun.nie@linaro.org>

---
 Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 13 +++++++++++++
 1 file changed, 13 insertions(+)

-- 
1.9.1

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Comments

Shawn Lin Oct. 24, 2016, 12:19 p.m. | #1
On 2016/10/24 17:11, Jun Nie wrote:
> Add fifo-addr-override property and fifo-watermark-quirk property to

> synopsys-dw-mshc bindings. It is intended to provide workarounds to

> support more SoCs that break current assumption.

>

> See Documentation/devicetree/bindings/reset/reset.txt for details.

>

> Signed-off-by: Jun Nie <jun.nie@linaro.org>

> ---

>  Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 13 +++++++++++++

>  1 file changed, 13 insertions(+)

>

> diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

> index 4e00e85..eb64921 100644

> --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

> +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

> @@ -76,6 +76,17 @@ Optional properties:

>

>  * broken-cd: as documented in mmc core bindings.

>

> +* fifo-addr-override: Override fifo address with value provided by DT. The FIFO

> +  reg offset of version 0x210A break current assumption that 0x100 (version < 0x240A)

> +  and 0x200(version >= 0x240A) in some implementation. So this property serves as

> +  workaround.


Can we hardcode this to the code by checking the host version?

> +

> +* fifo-watermark-quirk: Data done irq is expected if data length is less than

> +  watermark in PIO mode. But fifo watermark is requested to be aligned with data

> +  length in some SoC so that TX/RX irq can be generated with data done irq. Add the

> +  watermark quirk to mark this requirement and force fifo watermark setting

> +  accordingly.


I would like to know if this limitation is *really* related to some
Socs or the version of 210A dw_mmc?


> +

>  * vmmc-supply: The phandle to the regulator to use for vmmc.  If this is

>    specified we'll defer probe until we can find this regulator.

>

> @@ -103,6 +114,8 @@ board specific portions as listed below.

>  		interrupts = <0 75 0>;

>  		#address-cells = <1>;

>  		#size-cells = <0>;

> +		fifo-addr-override = <0x200>;

> +		fifo-watermark-quirk;

>  	};

>

>  [board specific internal DMA resources]

>



-- 
Best Regards
Shawn Lin

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Jaehoon Chung Oct. 25, 2016, 2:16 a.m. | #2
On 10/24/2016 09:19 PM, Shawn Lin wrote:
> On 2016/10/24 17:11, Jun Nie wrote:

>> Add fifo-addr-override property and fifo-watermark-quirk property to

>> synopsys-dw-mshc bindings. It is intended to provide workarounds to

>> support more SoCs that break current assumption.

>>

>> See Documentation/devicetree/bindings/reset/reset.txt for details.

>>

>> Signed-off-by: Jun Nie <jun.nie@linaro.org>

>> ---

>>  Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 13 +++++++++++++

>>  1 file changed, 13 insertions(+)

>>

>> diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

>> index 4e00e85..eb64921 100644

>> --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

>> +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

>> @@ -76,6 +76,17 @@ Optional properties:

>>

>>  * broken-cd: as documented in mmc core bindings.

>>

>> +* fifo-addr-override: Override fifo address with value provided by DT. The FIFO

>> +  reg offset of version 0x210A break current assumption that 0x100 (version < 0x240A)

>> +  and 0x200(version >= 0x240A) in some implementation. So this property serves as

>> +  workaround.

> 

> Can we hardcode this to the code by checking the host version?


I think it should be not workaround..According to TRM, Address is equal or greater than 0x100.
It means address can be 0x200, right?
If you needs to overwrite the DATA register offset for your target, just can add the property for this.

> 

>> +

>> +* fifo-watermark-quirk: Data done irq is expected if data length is less than

>> +  watermark in PIO mode. But fifo watermark is requested to be aligned with data

>> +  length in some SoC so that TX/RX irq can be generated with data done irq. Add the

>> +  watermark quirk to mark this requirement and force fifo watermark setting

>> +  accordingly.

> 

> I would like to know if this limitation is *really* related to some

> Socs or the version of 210A dw_mmc?

> 

> 

>> +

>>  * vmmc-supply: The phandle to the regulator to use for vmmc.  If this is

>>    specified we'll defer probe until we can find this regulator.

>>

>> @@ -103,6 +114,8 @@ board specific portions as listed below.

>>          interrupts = <0 75 0>;

>>          #address-cells = <1>;

>>          #size-cells = <0>;

>> +        fifo-addr-override = <0x200>;

>> +        fifo-watermark-quirk;

>>      };

>>

>>  [board specific internal DMA resources]

>>

> 

> 


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Shawn Lin Oct. 25, 2016, 4:17 a.m. | #3
On 2016/10/25 10:16, Jaehoon Chung wrote:
> On 10/24/2016 09:19 PM, Shawn Lin wrote:

>> On 2016/10/24 17:11, Jun Nie wrote:

>>> Add fifo-addr-override property and fifo-watermark-quirk property to

>>> synopsys-dw-mshc bindings. It is intended to provide workarounds to

>>> support more SoCs that break current assumption.

>>>

>>> See Documentation/devicetree/bindings/reset/reset.txt for details.

>>>

>>> Signed-off-by: Jun Nie <jun.nie@linaro.org>

>>> ---

>>>  Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 13 +++++++++++++

>>>  1 file changed, 13 insertions(+)

>>>

>>> diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

>>> index 4e00e85..eb64921 100644

>>> --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

>>> +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

>>> @@ -76,6 +76,17 @@ Optional properties:

>>>

>>>  * broken-cd: as documented in mmc core bindings.

>>>

>>> +* fifo-addr-override: Override fifo address with value provided by DT. The FIFO

>>> +  reg offset of version 0x210A break current assumption that 0x100 (version < 0x240A)

>>> +  and 0x200(version >= 0x240A) in some implementation. So this property serves as

>>> +  workaround.

>>

>> Can we hardcode this to the code by checking the host version?

>

> I think it should be not workaround..According to TRM, Address is equal or greater than 0x100.

> It means address can be 0x200, right?

> If you needs to overwrite the DATA register offset for your target, just can add the property for this.

>


I can't follow yours here as I don't have 210A TRM. Do you mean the TRM
for 210A say: "Address  is equal or greater than 0x100"  ?

>>

>>> +

>>> +* fifo-watermark-quirk: Data done irq is expected if data length is less than

>>> +  watermark in PIO mode. But fifo watermark is requested to be aligned with data

>>> +  length in some SoC so that TX/RX irq can be generated with data done irq. Add the

>>> +  watermark quirk to mark this requirement and force fifo watermark setting

>>> +  accordingly.

>>

>> I would like to know if this limitation is *really* related to some

>> Socs or the version of 210A dw_mmc?

>>

>>

>>> +

>>>  * vmmc-supply: The phandle to the regulator to use for vmmc.  If this is

>>>    specified we'll defer probe until we can find this regulator.

>>>

>>> @@ -103,6 +114,8 @@ board specific portions as listed below.

>>>          interrupts = <0 75 0>;

>>>          #address-cells = <1>;

>>>          #size-cells = <0>;

>>> +        fifo-addr-override = <0x200>;

>>> +        fifo-watermark-quirk;

>>>      };

>>>

>>>  [board specific internal DMA resources]

>>>

>>

>>

>

>

>

>



-- 
Best Regards
Shawn Lin

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Jaehoon Chung Oct. 25, 2016, 8:09 a.m. | #4
On 10/25/2016 01:17 PM, Shawn Lin wrote:
> On 2016/10/25 10:16, Jaehoon Chung wrote:

>> On 10/24/2016 09:19 PM, Shawn Lin wrote:

>>> On 2016/10/24 17:11, Jun Nie wrote:

>>>> Add fifo-addr-override property and fifo-watermark-quirk property to

>>>> synopsys-dw-mshc bindings. It is intended to provide workarounds to

>>>> support more SoCs that break current assumption.

>>>>

>>>> See Documentation/devicetree/bindings/reset/reset.txt for details.

>>>>

>>>> Signed-off-by: Jun Nie <jun.nie@linaro.org>

>>>> ---

>>>>  Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 13 +++++++++++++

>>>>  1 file changed, 13 insertions(+)

>>>>

>>>> diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

>>>> index 4e00e85..eb64921 100644

>>>> --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

>>>> +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

>>>> @@ -76,6 +76,17 @@ Optional properties:

>>>>

>>>>  * broken-cd: as documented in mmc core bindings.

>>>>

>>>> +* fifo-addr-override: Override fifo address with value provided by DT. The FIFO

>>>> +  reg offset of version 0x210A break current assumption that 0x100 (version < 0x240A)

>>>> +  and 0x200(version >= 0x240A) in some implementation. So this property serves as

>>>> +  workaround.

>>>

>>> Can we hardcode this to the code by checking the host version?

>>

>> I think it should be not workaround..According to TRM, Address is equal or greater than 0x100.

>> It means address can be 0x200, right?

>> If you needs to overwrite the DATA register offset for your target, just can add the property for this.

>>

> 

> I can't follow yours here as I don't have 210A TRM. Do you mean the TRM

> for 210A say: "Address  is equal or greater than 0x100"  ?


Upper version than IP 2.40a is used the offset 0x100 as other purpose.
For preventing to use wrong register. we put to check host->verid.

Yes, can set the address to any value 0x100 or greater. 
If some soc needs to use 0x200, why not?

But it's not true that FIFO reg offset of version 2.10a break.
I have checked 2.10a TRM..It's DATA offset >= 0x100.

Best Regards,
Jaehoon Chung

> 

>>>

>>>> +

>>>> +* fifo-watermark-quirk: Data done irq is expected if data length is less than

>>>> +  watermark in PIO mode. But fifo watermark is requested to be aligned with data

>>>> +  length in some SoC so that TX/RX irq can be generated with data done irq. Add the

>>>> +  watermark quirk to mark this requirement and force fifo watermark setting

>>>> +  accordingly.

>>>

>>> I would like to know if this limitation is *really* related to some

>>> Socs or the version of 210A dw_mmc?

>>>

>>>

>>>> +

>>>>  * vmmc-supply: The phandle to the regulator to use for vmmc.  If this is

>>>>    specified we'll defer probe until we can find this regulator.

>>>>

>>>> @@ -103,6 +114,8 @@ board specific portions as listed below.

>>>>          interrupts = <0 75 0>;

>>>>          #address-cells = <1>;

>>>>          #size-cells = <0>;

>>>> +        fifo-addr-override = <0x200>;

>>>> +        fifo-watermark-quirk;

>>>>      };

>>>>

>>>>  [board specific internal DMA resources]

>>>>

>>>

>>>

>>

>>

>>

>>

> 

> 


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Jun Nie Oct. 25, 2016, 8:33 a.m. | #5
2016-10-25 16:09 GMT+08:00 Jaehoon Chung <jh80.chung@samsung.com>:
> On 10/25/2016 01:17 PM, Shawn Lin wrote:

>> On 2016/10/25 10:16, Jaehoon Chung wrote:

>>> On 10/24/2016 09:19 PM, Shawn Lin wrote:

>>>> On 2016/10/24 17:11, Jun Nie wrote:

>>>>> Add fifo-addr-override property and fifo-watermark-quirk property to

>>>>> synopsys-dw-mshc bindings. It is intended to provide workarounds to

>>>>> support more SoCs that break current assumption.

>>>>>

>>>>> See Documentation/devicetree/bindings/reset/reset.txt for details.

>>>>>

>>>>> Signed-off-by: Jun Nie <jun.nie@linaro.org>

>>>>> ---

>>>>>  Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt | 13 +++++++++++++

>>>>>  1 file changed, 13 insertions(+)

>>>>>

>>>>> diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

>>>>> index 4e00e85..eb64921 100644

>>>>> --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

>>>>> +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt

>>>>> @@ -76,6 +76,17 @@ Optional properties:

>>>>>

>>>>>  * broken-cd: as documented in mmc core bindings.

>>>>>

>>>>> +* fifo-addr-override: Override fifo address with value provided by DT. The FIFO

>>>>> +  reg offset of version 0x210A break current assumption that 0x100 (version < 0x240A)

>>>>> +  and 0x200(version >= 0x240A) in some implementation. So this property serves as

>>>>> +  workaround.

>>>>

>>>> Can we hardcode this to the code by checking the host version?

>>>

>>> I think it should be not workaround..According to TRM, Address is equal or greater than 0x100.

>>> It means address can be 0x200, right?

>>> If you needs to overwrite the DATA register offset for your target, just can add the property for this.

>>>

>>

>> I can't follow yours here as I don't have 210A TRM. Do you mean the TRM

>> for 210A say: "Address  is equal or greater than 0x100"  ?

>

> Upper version than IP 2.40a is used the offset 0x100 as other purpose.

> For preventing to use wrong register. we put to check host->verid.

>

> Yes, can set the address to any value 0x100 or greater.

> If some soc needs to use 0x200, why not?

>

> But it's not true that FIFO reg offset of version 2.10a break.

> I have checked 2.10a TRM..It's DATA offset >= 0x100.

>

> Best Regards,

> Jaehoon Chung


OK, will change property name to "fifo-addr" to set fifo reg address
via property in next version. I do not have 2.10a TRM and had assumed
current code is following the TRM.

Jun

>

>>

>>>>

>>>>> +

>>>>> +* fifo-watermark-quirk: Data done irq is expected if data length is less than

>>>>> +  watermark in PIO mode. But fifo watermark is requested to be aligned with data

>>>>> +  length in some SoC so that TX/RX irq can be generated with data done irq. Add the

>>>>> +  watermark quirk to mark this requirement and force fifo watermark setting

>>>>> +  accordingly.

>>>>

>>>> I would like to know if this limitation is *really* related to some

>>>> Socs or the version of 210A dw_mmc?

>>>>

>>>>

>>>>> +

>>>>>  * vmmc-supply: The phandle to the regulator to use for vmmc.  If this is

>>>>>    specified we'll defer probe until we can find this regulator.

>>>>>

>>>>> @@ -103,6 +114,8 @@ board specific portions as listed below.

>>>>>          interrupts = <0 75 0>;

>>>>>          #address-cells = <1>;

>>>>>          #size-cells = <0>;

>>>>> +        fifo-addr-override = <0x200>;

>>>>> +        fifo-watermark-quirk;

>>>>>      };

>>>>>

>>>>>  [board specific internal DMA resources]

>>>>>

>>>>

>>>>

>>>

>>>

>>>

>>>

>>

>>

>

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Patch

diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
index 4e00e85..eb64921 100644
--- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
+++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.txt
@@ -76,6 +76,17 @@  Optional properties:
 
 * broken-cd: as documented in mmc core bindings.
 
+* fifo-addr-override: Override fifo address with value provided by DT. The FIFO
+  reg offset of version 0x210A break current assumption that 0x100 (version < 0x240A)
+  and 0x200(version >= 0x240A) in some implementation. So this property serves as
+  workaround.
+
+* fifo-watermark-quirk: Data done irq is expected if data length is less than
+  watermark in PIO mode. But fifo watermark is requested to be aligned with data
+  length in some SoC so that TX/RX irq can be generated with data done irq. Add the
+  watermark quirk to mark this requirement and force fifo watermark setting
+  accordingly.
+
 * vmmc-supply: The phandle to the regulator to use for vmmc.  If this is
   specified we'll defer probe until we can find this regulator.
 
@@ -103,6 +114,8 @@  board specific portions as listed below.
 		interrupts = <0 75 0>;
 		#address-cells = <1>;
 		#size-cells = <0>;
+		fifo-addr-override = <0x200>;
+		fifo-watermark-quirk;
 	};
 
 [board specific internal DMA resources]