| Message ID | 20240526194254.459395-30-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk,
=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>
Subject: [PATCH v2 29/37] target/sparc: Add feature bit for VIS4
Date: Sun, 26 May 2024 12:42:46 -0700
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|
| Series |
target/sparc: Implement VIS4
|
expand
|
diff --git a/target/sparc/cpu-feature.h.inc b/target/sparc/cpu-feature.h.inc index e2e6de9144..be81005237 100644 --- a/target/sparc/cpu-feature.h.inc +++ b/target/sparc/cpu-feature.h.inc @@ -15,3 +15,4 @@ FEATURE(CASA) FEATURE(FMAF) FEATURE(VIS3) FEATURE(IMA) +FEATURE(VIS4) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index d47e1defc1..88e6da4f8b 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -2430,6 +2430,7 @@ static int extract_qfpreg(DisasContext *dc, int x) # define avail_VIS2(C) ((C)->def->features & CPU_FEATURE_VIS2) # define avail_VIS3(C) ((C)->def->features & CPU_FEATURE_VIS3) # define avail_VIS3B(C) avail_VIS3(C) +# define avail_VIS4(C) ((C)->def->features & CPU_FEATURE_VIS4) #else # define avail_32(C) true # define avail_ASR17(C) ((C)->def->features & CPU_FEATURE_ASR17) @@ -2446,6 +2447,7 @@ static int extract_qfpreg(DisasContext *dc, int x) # define avail_VIS2(C) false # define avail_VIS3(C) false # define avail_VIS3B(C) false +# define avail_VIS4(C) false #endif /* Default case for non jump instructions. */