| Message ID | 20240709-add_qcs9100_pcie_ep_compatible-v2-1-217742eac32b@quicinc.com |
|---|---|
| State | New |
| Headers | show |
| Series | [v2,1/2] dt-bindings: PCI: qcom-ep: Add support for QCS9100 SoC | expand |
diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml index 46802f7d9482..8012663e7efc 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml @@ -13,6 +13,7 @@ properties: compatible: oneOf: - enum: + - qcom,qcs9100-pcie-ep - qcom,sa8775p-pcie-ep - qcom,sdx55-pcie-ep - qcom,sm8450-pcie-ep @@ -203,6 +204,7 @@ allOf: compatible: contains: enum: + - qcom,qcs9100-pcie-ep - qcom,sa8775p-pcie-ep then: properties:
Add devicetree bindings support for QCS9100 SoC. It has DMA register space and dma interrupt to support HDMA. QCS9100 is drived from SA8775p. Currently, both the QCS9100 and SA8775p platform use non-SCMI resource. In the future, the SA8775p platform will move to use SCMI resources and it will have new sa8775p-related device tree. Consequently, introduce "qcom,qcs9100-pcie-ep" to describe non-SCMI based PCIe. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> --- Documentation/devicetree/bindings/pci/qcom,pcie-ep.yaml | 2 ++ 1 file changed, 2 insertions(+)