[AArch64] Add ARMv8.3 combined pointer authentication branch instructions

Message ID 5821A51E.4000402@arm.com
State New
Headers show

Commit Message

Szabolcs Nagy Nov. 8, 2016, 10:12 a.m.
Add support for ARMv8.3 pointer authentication instructions
that are encoded as unconditional branch instructions.

(generated files are not in the diff.)

opcodes/
2016-11-08  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* aarch64-tbl.h (arch64_opcode_table): Add braa, brab, blraa, blrab, braaz,
	brabz, blraaz, blrabz, retaa, retab, eretaa, eretab.
	* aarch64-asm-2.c: Regenerate.
	* aarch64-dis-2.c: Regenerate.
	* aarch64-opc-2.c: Regenerate.

gas/testsuite/
2016-11-08  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* gas/aarch64/pac.s: Add ARMv8.3 branch instruction tests.
	* gas/aarch64/pac.d: Likewise.

Comments

Nick Clifton Nov. 10, 2016, 2:49 p.m. | #1
Hi Szabolcs,

> opcodes/

> 2016-11-08  Szabolcs Nagy  <szabolcs.nagy@arm.com>

> 

> 	* aarch64-tbl.h (arch64_opcode_table): Add braa, brab, blraa, blrab, braaz,

> 	brabz, blraaz, blrabz, retaa, retab, eretaa, eretab.

> 	* aarch64-asm-2.c: Regenerate.

> 	* aarch64-dis-2.c: Regenerate.

> 	* aarch64-opc-2.c: Regenerate.

> 

> gas/testsuite/

> 2016-11-08  Szabolcs Nagy  <szabolcs.nagy@arm.com>

> 

> 	* gas/aarch64/pac.s: Add ARMv8.3 branch instruction tests.

> 	* gas/aarch64/pac.d: Likewise.


Approved - please apply - but ... would you mind adding an entry in the
gas/NEWS file mentioning the new support for ARMv8.3 please ?

Cheers
  Nick

Patch

diff --git a/gas/testsuite/gas/aarch64/pac.d b/gas/testsuite/gas/aarch64/pac.d
index 4efbd88..c242b2d 100644
--- a/gas/testsuite/gas/aarch64/pac.d
+++ b/gas/testsuite/gas/aarch64/pac.d
@@ -34,3 +34,19 @@  Disassembly of section \.text:
   64:	dac147e5 	xpacd	x5
   68:	9ac33041 	pacga	x1, x2, x3
   6c:	9adf3041 	pacga	x1, x2, sp
+  70:	d71f0822 	braa	x1, x2
+  74:	d71f087f 	braa	x3, sp
+  78:	d71f0c22 	brab	x1, x2
+  7c:	d71f0c7f 	brab	x3, sp
+  80:	d73f0822 	blraa	x1, x2
+  84:	d73f087f 	blraa	x3, sp
+  88:	d73f0c22 	blrab	x1, x2
+  8c:	d73f0c7f 	blrab	x3, sp
+  90:	d61f08bf 	braaz	x5
+  94:	d61f0cbf 	brabz	x5
+  98:	d63f08bf 	blraaz	x5
+  9c:	d63f0cbf 	blrabz	x5
+  a0:	d65f0bff 	retaa
+  a4:	d65f0fff 	retab
+  a8:	d69f0bff 	eretaa
+  ac:	d69f0fff 	eretab
diff --git a/gas/testsuite/gas/aarch64/pac.s b/gas/testsuite/gas/aarch64/pac.s
index 88f43a8..59fa637 100644
--- a/gas/testsuite/gas/aarch64/pac.s
+++ b/gas/testsuite/gas/aarch64/pac.s
@@ -35,3 +35,22 @@ 
 
 	pacga x1, x2, x3
 	pacga x1, x2, sp
+
+	/* Combined instructions.  */
+	braa x1, x2
+	braa x3, sp
+	brab x1, x2
+	brab x3, sp
+	blraa x1, x2
+	blraa x3, sp
+	blrab x1, x2
+	blrab x3, sp
+	braaz x5
+	brabz x5
+	blraaz x5
+	blrabz x5
+
+	retaa
+	retab
+	eretaa
+	eretab
diff --git a/opcodes/aarch64-tbl.h b/opcodes/aarch64-tbl.h
index f4c0bd1..f5750a2 100644
--- a/opcodes/aarch64-tbl.h
+++ b/opcodes/aarch64-tbl.h
@@ -2618,6 +2618,18 @@  struct aarch64_opcode aarch64_opcode_table[] =
   CORE_INSN ("ret", 0xd65f0000, 0xfffffc1f, branch_reg, 0, OP1 (Rn), QL_I1X, F_OPD0_OPT | F_DEFAULT (30)),
   CORE_INSN ("eret", 0xd69f03e0, 0xffffffff, branch_reg, 0, OP0 (), {}, 0),
   CORE_INSN ("drps", 0xd6bf03e0, 0xffffffff, branch_reg, 0, OP0 (), {}, 0),
+  V8_3_INSN ("braa", 0xd71f0800, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, 0),
+  V8_3_INSN ("brab", 0xd71f0c00, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, 0),
+  V8_3_INSN ("blraa", 0xd73f0800, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, 0),
+  V8_3_INSN ("blrab", 0xd73f0c00, 0xfffffc00, branch_reg, OP2 (Rn, Rd_SP), QL_I2SAMEX, 0),
+  V8_3_INSN ("braaz", 0xd61f081f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, 0),
+  V8_3_INSN ("brabz", 0xd61f0c1f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, 0),
+  V8_3_INSN ("blraaz", 0xd63f081f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, 0),
+  V8_3_INSN ("blrabz", 0xd63f0c1f, 0xfffffc1f, branch_reg, OP1 (Rn), QL_I1X, 0),
+  V8_3_INSN ("retaa", 0xd65f0bff, 0xffffffff, branch_reg, OP0 (), {}, 0),
+  V8_3_INSN ("retab", 0xd65f0fff, 0xffffffff, branch_reg, OP0 (), {}, 0),
+  V8_3_INSN ("eretaa", 0xd69f0bff, 0xffffffff, branch_reg, OP0 (), {}, 0),
+  V8_3_INSN ("eretab", 0xd69f0fff, 0xffffffff, branch_reg, OP0 (), {}, 0),
   /* Compare & branch (immediate).  */
   CORE_INSN ("cbz", 0x34000000, 0x7f000000, compbranch, 0, OP2 (Rt, ADDR_PCREL19), QL_R_PCREL, F_SF),
   CORE_INSN ("cbnz", 0x35000000, 0x7f000000, compbranch, 0, OP2 (Rt, ADDR_PCREL19), QL_R_PCREL, F_SF),