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[PULL,4/4] target/xtensa: Correct assert condition in handle_interrupt()

Message ID 20240801142322.3948866-5-peter.maydell@linaro.org
State Accepted
Commit 5e8e4f098d872818aa9a138a171200068b81c8d1
Headers show
Series [PULL,1/4] hw/arm/mps2-tz.c: fix RX/TX interrupts order | expand

Commit Message

Peter Maydell Aug. 1, 2024, 2:23 p.m. UTC 
In commit ad18376b90c8101 we added an assert that the level value was
in-bounds for the array we're about to index into.  However, the
assert condition is wrong -- env->config->interrupt_vector is an
array of uint32_t, so we should bounds check the index against
ARRAY_SIZE(...), not against sizeof().

Resolves: Coverity CID 1507131
Fixes: ad18376b90c8101 ("target/xtensa: Assert that interrupt level is within bounds")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-id: 20240731172246.3682311-1-peter.maydell@linaro.org
---
 target/xtensa/exc_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/target/xtensa/exc_helper.c b/target/xtensa/exc_helper.c
index 0514c2c1f32..ca629f071d1 100644
--- a/target/xtensa/exc_helper.c
+++ b/target/xtensa/exc_helper.c
@@ -171,7 +171,7 @@  static void handle_interrupt(CPUXtensaState *env)
 
         if (level > 1) {
             /* env->config->nlevel check should have ensured this */
-            assert(level < sizeof(env->config->interrupt_vector));
+            assert(level < ARRAY_SIZE(env->config->interrupt_vector));
 
             env->sregs[EPC1 + level - 1] = env->pc;
             env->sregs[EPS2 + level - 2] = env->sregs[PS];