[Linaro-uefi,08/28] Hisilicon: remove D02 unused ACPI files

Message ID 1479122995-50330-9-git-send-email-heyi.guo@linaro.org
State New
Headers show

Commit Message

Heyi Guo Nov. 14, 2016, 11:29 a.m.
D02 ACPI related files locate in Chips/Hisilicon/Pv660/Pv660Acpitables
D03 ACPI related files will be moved to
Chips/Hisilicon/Hi1610/Hi1610AcpiTables

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
---
 .../Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf     |  56 --
 Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl  | 337 ------------
 Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc |  85 ----
 .../Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl          | 562 ---------------------
 .../Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl         | 125 -----
 .../Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl          | 261 ----------
 .../Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl          | 247 ---------
 .../Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl          | 136 -----
 .../Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl      |  29 --
 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl |  25 -
 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sas.asl | 152 ------
 .../Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sata.asl  |  39 --
 .../Pv660/Pv660AcpiTables/MadtHi1610.aslc          | 128 -----
 Chips/Hisilicon/Pv660/Pv660AcpiTables/Slit.aslc    |  81 ---
 Chips/Hisilicon/Pv660/Pv660AcpiTables/Srat.aslc    | 115 -----
 15 files changed, 2378 deletions(-)
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sas.asl
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sata.asl
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Slit.aslc
 delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Srat.aslc

Comments

Leif Lindholm Nov. 15, 2016, 8:17 p.m. | #1
On Mon, Nov 14, 2016 at 07:29:35PM +0800, Heyi Guo wrote:
> D02 ACPI related files locate in Chips/Hisilicon/Pv660/Pv660Acpitables
> D03 ACPI related files will be moved to
> Chips/Hisilicon/Hi1610/Hi1610AcpiTables
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>

Waiting for comments from Graeme/Hanjun on the rest of the ACPI
patches, but for this one:

Reviewed-by: Leif Lindholm

> ---
>  .../Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf     |  56 --
>  Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl  | 337 ------------
>  Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc |  85 ----
>  .../Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl          | 562 ---------------------
>  .../Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl         | 125 -----
>  .../Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl          | 261 ----------
>  .../Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl          | 247 ---------
>  .../Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl          | 136 -----
>  .../Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl      |  29 --
>  Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl |  25 -
>  Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sas.asl | 152 ------
>  .../Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sata.asl  |  39 --
>  .../Pv660/Pv660AcpiTables/MadtHi1610.aslc          | 128 -----
>  Chips/Hisilicon/Pv660/Pv660AcpiTables/Slit.aslc    |  81 ---
>  Chips/Hisilicon/Pv660/Pv660AcpiTables/Srat.aslc    | 115 -----
>  15 files changed, 2378 deletions(-)
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sas.asl
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sata.asl
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Slit.aslc
>  delete mode 100644 Chips/Hisilicon/Pv660/Pv660AcpiTables/Srat.aslc
> 
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf b/Chips/Hisilicon/Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf
> deleted file mode 100644
> index b6be3d9..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf
> +++ /dev/null
> @@ -1,56 +0,0 @@
> -## @file
> -#
> -#  ACPI table data and ASL sources required to boot the platform.
> -#
> -#  Copyright (c) 2014, ARM Ltd. All rights reserved.
> -#  Copyright (c) 2015, Hisilicon Limited. All rights reserved.
> -#  Copyright (c) 2015, Linaro Limited. All rights reserved.
> -#
> -#  This program and the accompanying materials
> -#  are licensed and made available under the terms and conditions of the BSD License
> -#  which accompanies this distribution.  The full text of the license may be found at
> -#  http://opensource.org/licenses/bsd-license.php
> -#
> -#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -#
> -#  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> -#
> -##
> -
> -[Defines]
> -  INF_VERSION                    = 0x00010005
> -  BASE_NAME                      = Hi1610AcpiTables
> -  FILE_GUID                      = 7E374E25-8E01-4FEE-87F2-390C23C606CD
> -  MODULE_TYPE                    = USER_DEFINED
> -  VERSION_STRING                 = 1.0
> -
> -[Sources]
> -  Dsdt/DsdtHi1610.asl
> -  Facs.aslc
> -  Fadt.aslc
> -  Gtdt.aslc
> -  MadtHi1610.aslc
> -  D03Mcfg.aslc
> -  D03Iort.asl
> -
> -[Packages]
> -  ArmPkg/ArmPkg.dec
> -  ArmPlatformPkg/ArmPlatformPkg.dec
> -  EmbeddedPkg/EmbeddedPkg.dec
> -  MdePkg/MdePkg.dec
> -  MdeModulePkg/MdeModulePkg.dec
> -
> -  OpenPlatformPkg/Chips/Hisilicon/HisiPkg.dec
> -
> -[FixedPcd]
> -  gArmPlatformTokenSpaceGuid.PcdCoreCount
> -  gArmTokenSpaceGuid.PcdGicDistributorBase
> -  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
> -
> -  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
> -  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
> -  gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
> -  gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
> -  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
> -
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl
> deleted file mode 100644
> index 07660df..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl
> +++ /dev/null
> @@ -1,337 +0,0 @@
> -/*
> - * Intel ACPI Component Architecture
> - * iASL Compiler/Disassembler version 20151124-64
> - * Copyright (c) 2000 - 2015 Intel Corporation
> - *
> - * Template for [IORT] ACPI Table (static data table)
> - * Format: [ByteLength]  FieldName : HexFieldValue
> - */
> -[0004]                          Signature : "IORT"    [IO Remapping Table]
> -[0004]                       Table Length : 0000029e
> -[0001]                           Revision : 00
> -[0001]                           Checksum : BC
> -[0006]                             Oem ID : "HISI "
> -[0008]                       Oem Table ID : "D03"
> -[0004]                       Oem Revision : 00000000
> -[0004]                    Asl Compiler ID : "INTL"
> -[0004]              Asl Compiler Revision : 20150410
> -
> -[0004]                         Node Count : 00000008
> -[0004]                        Node Offset : 00000034
> -[0004]                           Reserved : 00000000
> -[0004]                   Optional Padding : 00 00 00 00
> -
> -/* ITS 0, for dsa */
> -[0001]                               Type : 00
> -[0002]                             Length : 0018
> -[0001]                           Revision : 00
> -[0004]                           Reserved : 00000000
> -[0004]                      Mapping Count : 00000000
> -[0004]                     Mapping Offset : 00000000
> -
> -[0004]                           ItsCount : 00000001
> -[0004]                        Identifiers : 00000000
> -
> -/* mbi-gen dsa  mbi0 - usb, named component */
> -[0001]                               Type : 01
> -[0002]                             Length : 0046
> -[0001]                           Revision : 00
> -[0004]                           Reserved : 00000000
> -[0004]                      Mapping Count : 00000001
> -[0004]                     Mapping Offset : 00000032
> -
> -[0004]                         Node Flags : 00000000
> -[0008]                  Memory Properties : [IORT Memory Access Properties]
> -[0004]                    Cache Coherency : 00000000
> -[0001]              Hints (decoded below) : 00
> -                                Transient : 0
> -                           Write Allocate : 0
> -                            Read Allocate : 0
> -                                 Override : 0
> -[0002]                           Reserved : 0000
> -[0001]       Memory Flags (decoded below) : 00
> -                                Coherency : 0
> -                         Device Attribute : 0
> -[0001]                  Memory Size Limit : 00
> -[0017]                        Device Name : "\_SB_.MBI0"
> -[0004]                            Padding : 00 00 00 00
> -
> -[0004]                         Input base : 00000000
> -[0004]                           ID Count : 00000001
> -[0004]                        Output Base : 00040080  // device id
> -[0004]                   Output Reference : 00000034  // point to its dsa
> -[0004]              Flags (decoded below) : 00000000
> -                           Single Mapping : 1
> -
> -/* mbi-gen dsa mbi1 - sas1, named component */
> -[0001]                               Type : 01
> -[0002]                             Length : 0046
> -[0001]                           Revision : 00
> -[0004]                           Reserved : 00000000
> -[0004]                      Mapping Count : 00000001
> -[0004]                     Mapping Offset : 00000032
> -
> -[0004]                         Node Flags : 00000000
> -[0008]                  Memory Properties : [IORT Memory Access Properties]
> -[0004]                    Cache Coherency : 00000000
> -[0001]              Hints (decoded below) : 00
> -                                Transient : 0
> -                           Write Allocate : 0
> -                            Read Allocate : 0
> -                                 Override : 0
> -[0002]                           Reserved : 0000
> -[0001]       Memory Flags (decoded below) : 00
> -                                Coherency : 0
> -                         Device Attribute : 0
> -[0001]                  Memory Size Limit : 00
> -[0016]                        Device Name : "\_SB_.MBI1"
> -[0004]                            Padding : 00 00 00 00
> -
> -[0004]                         Input base : 00000000
> -[0004]                           ID Count : 00000001
> -[0004]                        Output Base : 00040000
> -[0004]                   Output Reference : 00000034
> -[0004]              Flags (decoded below) : 00000000
> -                           Single Mapping : 1
> -
> -/* mbi-gen dsa mbi2 - sas2, named component */
> -[0001]                               Type : 01
> -[0002]                             Length : 0046
> -[0001]                           Revision : 00
> -[0004]                           Reserved : 00000000
> -[0004]                      Mapping Count : 00000001
> -[0004]                     Mapping Offset : 00000032
> -
> -[0004]                         Node Flags : 00000000
> -[0008]                  Memory Properties : [IORT Memory Access Properties]
> -[0004]                    Cache Coherency : 00000000
> -[0001]              Hints (decoded below) : 00
> -                                Transient : 0
> -                           Write Allocate : 0
> -                            Read Allocate : 0
> -                                 Override : 0
> -[0002]                           Reserved : 0000
> -[0001]       Memory Flags (decoded below) : 00
> -                                Coherency : 0
> -                         Device Attribute : 0
> -[0001]                  Memory Size Limit : 00
> -[0016]                        Device Name : "\_SB_.MBI2"
> -[0004]                            Padding : 00 00 00 00
> -
> -[0004]                         Input base : 00000000
> -[0004]                           ID Count : 00000001
> -[0004]                        Output Base : 00040040
> -[0004]                   Output Reference : 00000034
> -[0004]              Flags (decoded below) : 00000000
> -                           Single Mapping : 1
> -
> -/* mbi-gen dsa mbi3 - dsa0, srv named component */
> -[0001]                               Type : 01
> -[0002]                             Length : 0046
> -[0001]                           Revision : 00
> -[0004]                           Reserved : 00000000
> -[0004]                      Mapping Count : 00000001
> -[0004]                     Mapping Offset : 00000032
> -
> -[0004]                         Node Flags : 00000000
> -[0008]                  Memory Properties : [IORT Memory Access Properties]
> -[0004]                    Cache Coherency : 00000000
> -[0001]              Hints (decoded below) : 00
> -                                Transient : 0
> -                           Write Allocate : 0
> -                            Read Allocate : 0
> -                                 Override : 0
> -[0002]                           Reserved : 0000
> -[0001]       Memory Flags (decoded below) : 00
> -                                Coherency : 0
> -                         Device Attribute : 0
> -[0001]                  Memory Size Limit : 00
> -[0016]                        Device Name : "\_SB_.MBI3"
> -[0004]                            Padding : 00 00 00 00
> -
> -[0004]                         Input base : 00000000
> -[0004]                           ID Count : 00000001
> -[0004]                        Output Base : 00040800
> -[0004]                   Output Reference : 00000034
> -[0004]              Flags (decoded below) : 00000000
> -                           Single Mapping : 1
> -
> -/* mbi-gen dsa mbi4 - dsa1, dbg0 named component */
> -[0001]                               Type : 01
> -[0002]                             Length : 0046
> -[0001]                           Revision : 00
> -[0004]                           Reserved : 00000000
> -[0004]                      Mapping Count : 00000001
> -[0004]                     Mapping Offset : 00000032
> -
> -[0004]                         Node Flags : 00000000
> -[0008]                  Memory Properties : [IORT Memory Access Properties]
> -[0004]                    Cache Coherency : 00000000
> -[0001]              Hints (decoded below) : 00
> -                                Transient : 0
> -                           Write Allocate : 0
> -                            Read Allocate : 0
> -                                 Override : 0
> -[0002]                           Reserved : 0000
> -[0001]       Memory Flags (decoded below) : 00
> -                                Coherency : 0
> -                         Device Attribute : 0
> -[0001]                  Memory Size Limit : 00
> -[0016]                        Device Name : "\_SB_.MBI4"
> -[0004]                            Padding : 00 00 00 00
> -
> -[0004]                         Input base : 00000000
> -[0004]                           ID Count : 00000001
> -[0004]                        Output Base : 00040b1c
> -[0004]                   Output Reference : 00000034
> -[0004]              Flags (decoded below) : 00000000
> -                           Single Mapping : 1
> -
> -/* mbi-gen dsa mbi5 - dsa2, dbg1  named component */
> -[0001]                               Type : 01
> -[0002]                             Length : 0046
> -[0001]                           Revision : 00
> -[0004]                           Reserved : 00000000
> -[0004]                      Mapping Count : 00000001
> -[0004]                     Mapping Offset : 00000032
> -
> -[0004]                         Node Flags : 00000000
> -[0008]                  Memory Properties : [IORT Memory Access Properties]
> -[0004]                    Cache Coherency : 00000000
> -[0001]              Hints (decoded below) : 00
> -                                Transient : 0
> -                           Write Allocate : 0
> -                            Read Allocate : 0
> -                                 Override : 0
> -[0002]                           Reserved : 0000
> -[0001]       Memory Flags (decoded below) : 00
> -                                Coherency : 0
> -                         Device Attribute : 0
> -[0001]                  Memory Size Limit : 00
> -[0016]                        Device Name : "\_SB_.MBI5"
> -[0004]                            Padding : 00 00 00 00
> -
> -[0004]                         Input base : 00000000
> -[0004]                           ID Count : 00000001
> -[0004]                        Output Base : 00040b1d
> -[0004]                   Output Reference : 00000034
> -[0004]              Flags (decoded below) : 00000000
> -                           Single Mapping : 1
> -
> -/* mbi-gen dsa mbi6 - dsa sas0  named component */
> -[0001]                               Type : 01
> -[0002]                             Length : 0046
> -[0001]                           Revision : 00
> -[0004]                           Reserved : 00000000
> -[0004]                      Mapping Count : 00000001
> -[0004]                     Mapping Offset : 00000032
> -
> -[0004]                         Node Flags : 00000000
> -[0008]                  Memory Properties : [IORT Memory Access Properties]
> -[0004]                    Cache Coherency : 00000000
> -[0001]              Hints (decoded below) : 00
> -                                Transient : 0
> -                           Write Allocate : 0
> -                            Read Allocate : 0
> -                                 Override : 0
> -[0002]                           Reserved : 0000
> -[0001]       Memory Flags (decoded below) : 00
> -                                Coherency : 0
> -                         Device Attribute : 0
> -[0001]                  Memory Size Limit : 00
> -[0016]                        Device Name : "\_SB_.MBI6"
> -[0004]                            Padding : 00 00 00 00
> -
> -[0004]                         Input base : 00000000
> -[0004]                           ID Count : 00000001
> -[0004]                        Output Base : 00040900
> -[0004]                   Output Reference : 00000034
> -[0004]              Flags (decoded below) : 00000000
> -                           Single Mapping : 1
> -
> -/* RC 0 */
> -[0001]                               Type : 02
> -[0002]                             Length : 0034
> -[0001]                           Revision : 00
> -[0004]                           Reserved : 00000000
> -[0004]                      Mapping Count : 00000001
> -[0004]                     Mapping Offset : 00000020
> -
> -[0008]                  Memory Properties : [IORT Memory Access Properties]
> -[0004]                    Cache Coherency : 00000001
> -[0001]              Hints (decoded below) : 00
> -                                Transient : 0
> -                           Write Allocate : 0
> -                            Read Allocate : 0
> -                                 Override : 0
> -[0002]                           Reserved : 0000
> -[0001]       Memory Flags (decoded below) : 00
> -                                Coherency : 0
> -                         Device Attribute : 0
> -[0004]                      ATS Attribute : 00000000
> -[0004]                 PCI Segment Number : 00000000
> -
> -[0004]                         Input base : 00000000
> -[0004]                           ID Count : 00002000
> -[0004]                        Output Base : 00000000
> -[0004]                   Output Reference : 00000034
> -[0004]              Flags (decoded below) : 00000000
> -                           Single Mapping : 0
> -
> -/* RC 1 */
> -[0001]                               Type : 02
> -[0002]                             Length : 0034
> -[0001]                           Revision : 00
> -[0004]                           Reserved : 00000000
> -[0004]                      Mapping Count : 00000001
> -[0004]                     Mapping Offset : 00000020
> -
> -[0008]                  Memory Properties : [IORT Memory Access Properties]
> -[0004]                    Cache Coherency : 00000001
> -[0001]              Hints (decoded below) : 00
> -                                Transient : 0
> -                           Write Allocate : 0
> -                            Read Allocate : 0
> -                                 Override : 0
> -[0002]                           Reserved : 0000
> -[0001]       Memory Flags (decoded below) : 00
> -                                Coherency : 0
> -                         Device Attribute : 0
> -[0004]                      ATS Attribute : 00000000
> -[0004]                 PCI Segment Number : 00000001
> -
> -[0004]                         Input base : 0000e000
> -[0004]                           ID Count : 00002000
> -[0004]                        Output Base : 0000e000
> -[0004]                   Output Reference : 00000034
> -[0004]              Flags (decoded below) : 00000000
> -                           Single Mapping : 0
> -
> -/* RC 2 */
> -[0001]                               Type : 02
> -[0002]                             Length : 0034
> -[0001]                           Revision : 00
> -[0004]                           Reserved : 00000000
> -[0004]                      Mapping Count : 00000001
> -[0004]                     Mapping Offset : 00000020
> -
> -[0008]                  Memory Properties : [IORT Memory Access Properties]
> -[0004]                    Cache Coherency : 00000001
> -[0001]              Hints (decoded below) : 00
> -                                Transient : 0
> -                           Write Allocate : 0
> -                            Read Allocate : 0
> -                                 Override : 0
> -[0002]                           Reserved : 0000
> -[0001]       Memory Flags (decoded below) : 00
> -                                Coherency : 0
> -                         Device Attribute : 0
> -[0004]                      ATS Attribute : 00000000
> -[0004]                 PCI Segment Number : 00000002
> -
> -[0004]                         Input base : 00008000
> -[0004]                           ID Count : 00002000
> -[0004]                        Output Base : 00008000
> -[0004]                   Output Reference : 00000034
> -[0004]              Flags (decoded below) : 00000000
> -                           Single Mapping : 0
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc b/Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc
> deleted file mode 100644
> index 9f60803..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc
> +++ /dev/null
> @@ -1,85 +0,0 @@
> -/*
> - * Copyright (c) 2016 Hisilicon Limited
> - *
> - * All rights reserved. This program and the accompanying materials
> - * are made available under the terms of the BSD License which accompanies
> - * this distribution, and is available at
> - * http://opensource.org/licenses/bsd-license.php
> - *
> - */
> -
> -#include <IndustryStandard/Acpi.h>
> -#include "Pv660Platform.h"
> -
> -#define ACPI_5_0_MCFG_VERSION  0x1
> -
> -#pragma pack(1)
> -typedef struct
> -{
> -   UINT64 ullBaseAddress;
> -   UINT16 usSegGroupNum;
> -   UINT8  ucStartBusNum;
> -   UINT8  ucEndBusNum;
> -   UINT32 Reserved2;
> -}EFI_ACPI_5_0_MCFG_CONFIG_STRUCTURE;
> -
> -typedef struct
> -{
> -   EFI_ACPI_DESCRIPTION_HEADER Header;
> -   UINT64 Reserved1;
> -}EFI_ACPI_5_0_MCFG_TABLE_CONFIG;
> -
> -typedef struct
> -{
> -   EFI_ACPI_5_0_MCFG_TABLE_CONFIG Acpi_Table_Mcfg;
> -   EFI_ACPI_5_0_MCFG_CONFIG_STRUCTURE Config_Structure[3];
> -}EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_TABLE;
> -#pragma pack()
> -
> -EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_TABLE Mcfg=
> -{
> -  {
> -      {
> -        EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
> -        sizeof (EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_TABLE),
> -        ACPI_5_0_MCFG_VERSION,
> -        0x00,                                                     // Checksum will be updated at runtime
> -        {EFI_ACPI_ARM_OEM_ID},
> -        EFI_ACPI_ARM_OEM_TABLE_ID,
> -        EFI_ACPI_ARM_OEM_REVISION,
> -        EFI_ACPI_ARM_CREATOR_ID,
> -        EFI_ACPI_ARM_CREATOR_REVISION
> -      },
> -      0x0000000000000000,                                 //Reserved
> -  },
> -  {
> -
> -    {
> -      0xb0000000,                                         //Base Address
> -      0x0,                                                //Segment Group Number
> -      0x0,                                                //Start Bus Number
> -      0x1f,                                               //End Bus Number
> -      0x00000000,                                         //Reserved
> -    },
> -    {
> -      0xb0000000,                                         //Base Address
> -      0x1,                                                //Segment Group Number
> -      0xe0,                                               //Start Bus Number
> -      0xff,                                               //End Bus Number
> -      0x00000000,                                         //Reserved
> -    },
> -    {
> -      0xa0000000,                                         //Base Address
> -      0x2,                                                //Segment Group Number
> -      0x80,                                               //Start Bus Number
> -      0x9f,                                               //End Bus Number
> -      0x00000000,                                         //Reserved
> -    },
> -  }
> -};
> -
> -//
> -// Reference the table being generated to prevent the optimizer from removing the
> -// data structure from the executable
> -//
> -VOID* CONST ReferenceAcpiTable = &Mcfg;
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl
> deleted file mode 100644
> index d8d453a..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl
> +++ /dev/null
> @@ -1,562 +0,0 @@
> -/** @file
> -  Differentiated System Description Table Fields (DSDT)
> -
> -  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
> -    This program and the accompanying materials
> -  are licensed and made available under the terms and conditions of the BSD License
> -  which accompanies this distribution.  The full text of the license may be found at
> -  http://opensource.org/licenses/bsd-license.php
> -
> -  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -
> -**/
> -
> -Scope(_SB)
> -{
> -  Device (MDIO)
> -  {
> -    OperationRegion(CLKR, SystemMemory, 0x60000338, 8)
> -    Field(CLKR, DWordAcc, NoLock, Preserve) {
> -      CLKE, 1,  // clock enable
> -      , 31,
> -      CLKD, 1,  // clode disable
> -      , 31,
> -    }
> -    OperationRegion(RSTR, SystemMemory, 0x60000A38, 8)
> -    Field(RSTR, DWordAcc, NoLock, Preserve) {
> -      RSTE, 1,  // reset
> -      , 31,
> -      RSTD, 1,  // de-reset
> -      , 31,
> -    }
> -
> -    Name(_HID, "HISI0141")
> -    Name (_CRS, ResourceTemplate (){
> -      Memory32Fixed (ReadWrite, 0x603c0000 , 0x10000)
> -            })
> -
> -    Method(_RST, 0, Serialized) {
> -      Store (0x1, RSTE)
> -      Sleep (10)
> -      Store (0x1, CLKD)
> -      Sleep (10)
> -      Store (0x1, RSTD)
> -      Sleep (10)
> -      Store (0x1, CLKE)
> -      Sleep (10)
> -    }
> -  }
> -
> -  Device (DSF0)
> -  {
> -    OperationRegion(H3SR, SystemMemory, 0xC0000184, 4)
> -    Field(H3SR, DWordAcc, NoLock, Preserve) {
> -          H3ST, 1,
> -          , 31,  //RESERVED
> -        }
> -    OperationRegion(H4SR, SystemMemory, 0xC0000194, 4)
> -    Field(H4SR, DWordAcc, NoLock, Preserve) {
> -          H4ST, 1,
> -          , 31,  //RESERVED
> -        }
> -    // DSAF RESET
> -    OperationRegion(DRER, SystemMemory, 0xC0000A00, 8)
> -    Field(DRER, DWordAcc, NoLock, Preserve) {
> -          DRTE, 1,
> -          , 31,  //RESERVED
> -          DRTD, 1,
> -          , 31,  //RESERVED
> -        }
> -    // NT RESET
> -    OperationRegion(NRER, SystemMemory, 0xC0000A08, 8)
> -    Field(NRER, DWordAcc, NoLock, Preserve) {
> -          NRTE, 1,
> -          , 31,  //RESERVED
> -          NRTD, 1,
> -          , 31,  //RESERVED
> -        }
> -    // XGE RESET
> -    OperationRegion(XRER, SystemMemory, 0xC0000A10, 8)
> -    Field(XRER, DWordAcc, NoLock, Preserve) {
> -          XRTE, 31,
> -          , 1,    //RESERVED
> -          XRTD, 31,
> -          , 1,    //RESERVED
> -        }
> -
> -    // GE RESET
> -    OperationRegion(GRTR, SystemMemory, 0xC0000A18, 16)
> -    Field(GRTR, DWordAcc, NoLock, Preserve) {
> -          GR0E, 30,
> -          , 2,    //RESERVED
> -          GR0D, 30,
> -          , 2,    //RESERVED
> -          GR1E, 18,
> -          , 14,  //RESERVED
> -          GR1D, 18,
> -          , 14,  //RESERVED
> -        }
> -    // PPE RESET
> -    OperationRegion(PRTR, SystemMemory, 0xC0000A48, 8)
> -    Field(PRTR, DWordAcc, NoLock, Preserve) {
> -          PRTE, 10,
> -          , 22,  //RESERVED
> -          PRTD, 10,
> -          , 22,  //RESERVED
> -        }
> -
> -    // RCB PPE COM RESET
> -    OperationRegion(RRTR, SystemMemory, 0xC0000A88, 8)
> -    Field(RRTR, DWordAcc, NoLock, Preserve) {
> -          RRTE, 1,
> -          , 31,  //RESERVED
> -          RRTD, 1,
> -          , 31,  //RESERVED
> -        }
> -
> -    // Hilink access sel cfg reg
> -    OperationRegion(HSER, SystemMemory, 0xC2240008, 0x4)
> -    Field(HSER, DWordAcc, NoLock, Preserve) {
> -          HSEL, 2,  // hilink_access_sel & hilink_access_wr_pul
> -          , 30,    // RESERVED
> -        }
> -
> -    // Serdes
> -    OperationRegion(H4LR, SystemMemory, 0xC2208100, 0x1000)
> -    Field(H4LR, DWordAcc, NoLock, Preserve) {
> -          H4L0, 16,    // port0
> -          , 16,    //RESERVED
> -          Offset (0x400),
> -          H4L1, 16,    // port1
> -          , 16,    //RESERVED
> -          Offset (0x800),
> -          H4L2, 16,    // port2
> -          , 16,    //RESERVED
> -          Offset (0xc00),
> -          H4L3, 16,    // port3
> -          , 16,    //RESERVED
> -        }
> -    OperationRegion(H3LR, SystemMemory, 0xC2208900, 0x800)
> -    Field(H3LR, DWordAcc, NoLock, Preserve) {
> -          H3L2, 16,    // port4
> -          , 16,    //RESERVED
> -          Offset (0x400),
> -          H3L3, 16,    // port5
> -          , 16,    //RESERVED
> -        }
> -                Name (_HID, "HISI00B2")
> -                Name (_CCA, 1) // Cache-coherent controller
> -                Name (_CRS, ResourceTemplate (){
> -                        Memory32Fixed (ReadWrite, 0xc5000000 , 0x890000)
> -                        Memory32Fixed (ReadWrite, 0xc7000000 , 0x60000)
> -      Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive,,,)
> -        {
> -          576, 577, 578, 579, 580, 581, 582, 583, 584, 585, 586, 587, 588,
> -          589, 590, 591, 592, 593, 594, 595, 596, 597, 598, 599, 600,
> -        }
> -      Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive,,,)
> -        {
> -          960, 961, 962, 963, 964, 965, 966, 967, 968, 969, 970, 971, 972, 973, 974, 975,
> -          976, 977, 978, 979, 980, 981, 982, 983, 984, 985, 986, 987, 988, 989, 990, 991,
> -          992, 993, 994, 995, 996, 997, 998, 999, 1000, 1001, 1002, 1003, 1004, 1005, 1006, 1007,
> -          1008, 1009, 1010, 1011, 1012, 1013, 1014, 1015, 1016, 1017, 1018, 1019, 1020, 1021, 1022, 1023,
> -          1024, 1025, 1026, 1027, 1028, 1029, 1030, 1031, 1032, 1033, 1034, 1035, 1036, 1037, 1038, 1039,
> -          1040, 1041, 1042, 1043, 1044, 1045, 1046, 1047, 1048, 1049, 1050, 1051, 1052, 1053, 1054, 1055,
> -          1056, 1057, 1058, 1059, 1060, 1061, 1062, 1063, 1064, 1065, 1066, 1067, 1068, 1069, 1070, 1071,
> -          1072, 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081, 1082, 1083, 1084, 1085, 1086, 1087,
> -          1088, 1089, 1090, 1091, 1092, 1093, 1094, 1095, 1096, 1097, 1098, 1099, 1100, 1101, 1102, 1103,
> -          1104, 1105, 1106, 1107, 1108, 1109, 1110, 1111, 1112, 1113, 1114, 1115, 1116, 1117, 1118, 1119,
> -          1120, 1121, 1122, 1123, 1124, 1125, 1126, 1127, 1128, 1129, 1130, 1131, 1132, 1133, 1134, 1135,
> -          1136, 1137, 1138, 1139, 1140, 1141, 1142, 1143, 1144, 1145, 1146, 1147, 1148, 1149, 1150, 1151,
> -        }
> -      Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive,,,)
> -        {
> -          1152, 1153, 1154, 1155, 1156, 1157, 1158, 1159, 1160, 1161, 1162, 1163, 1164, 1165, 1166, 1167,
> -          1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177, 1178, 1179, 1180, 1181, 1182, 1183,
> -          1184, 1185, 1186, 1187, 1188, 1189, 1190, 1191, 1192, 1193, 1194, 1195, 1196, 1197, 1198, 1199,
> -          1200, 1201, 1202, 1203, 1204, 1205, 1206, 1207, 1208, 1209, 1210, 1211, 1212, 1213, 1214, 1215,
> -          1216, 1217, 1218, 1219, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1228, 1229, 1230, 1231,
> -          1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241, 1242, 1243, 1244, 1245, 1246, 1247,
> -          1248, 1249, 1250, 1251, 1252, 1253, 1254, 1255, 1256, 1257, 1258, 1259, 1260, 1261, 1262, 1263,
> -          1264, 1265, 1266, 1267, 1268, 1269, 1270, 1271, 1272, 1273, 1274, 1275, 1276, 1277, 1278, 1279,
> -          1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289, 1290, 1291, 1292, 1293, 1294, 1295,
> -          1296, 1297, 1298, 1299, 1300, 1301, 1302, 1303, 1304, 1305, 1306, 1307, 1308, 1309, 1310, 1311,
> -          1312, 1313, 1314, 1315, 1316, 1317, 1318, 1319, 1320, 1321, 1322, 1323, 1324, 1325, 1326, 1327,
> -          1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336, 1337, 1338, 1339, 1340, 1341, 1342, 1343,
> -        }
> -                })
> -                Name (_DSD, Package () {
> -                        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -      Package () {
> -        Package () {"mode", "6port-16rss"},
> -        Package () {"buf-size", 4096},
> -        Package () {"desc-num", 1024},
> -        Package () {"interrupt-parent", Package() {\_SB.MBI3}},
> -                        }
> -                })
> -
> -    //reset XGE port
> -    //Arg0 : XGE port index in dsaf
> -    //Arg1 : 0 reset, 1 cancle reset
> -    Method(XRST, 2, Serialized) {
> -      ShiftLeft (0x2082082, Arg0, Local0)
> -      Or (Local0, 0x1, Local0)
> -
> -      If (LEqual (Arg1, 0)) {
> -        Store(Local0, XRTE)
> -      } Else  {
> -        Store(Local0, XRTD)
> -      }
> -    }
> -
> -    //reset XGE core
> -    //Arg0 : XGE port index in dsaf
> -    //Arg1 : 0 reset, 1 cancle reset
> -    Method(XCRT, 2, Serialized) {
> -      ShiftLeft (0x2080, Arg0, Local0)
> -
> -      If (LEqual (Arg1, 0)) {
> -        Store(Local0, XRTE)
> -      } Else  {
> -        Store(Local0, XRTD)
> -      }
> -    }
> -
> -    //reset GE port
> -    //Arg0 : GE port index in dsaf
> -    //Arg1 : 0 reset, 1 cancle reset
> -    Method(GRST, 2, Serialized) {
> -      If (LLessEqual (Arg0, 5)) {
> -        //Service port
> -        ShiftLeft (0x2082082, Arg0, Local0)
> -        ShiftLeft (0x1, Arg0, Local1)
> -
> -        If (LEqual (Arg1, 0)) {
> -          Store(Local1, GR1E)
> -          Store(Local0, GR0E)
> -        } Else  {
> -          Store(Local0, GR0D)
> -          Store(Local1, GR1D)
> -        }
> -      }
> -    }
> -
> -    //reset PPE port
> -    //Arg0 : PPE port index in dsaf
> -    //Arg1 : 0 reset, 1 cancle reset
> -    Method(PRST, 2, Serialized) {
> -      ShiftLeft (0x1, Arg0, Local0)
> -      If (LEqual (Arg1, 0)) {
> -        Store(Local0, PRTE)
> -      } Else  {
> -        Store(Local0, PRTD)
> -      }
> -    }
> -
> -    // Set Serdes Loopback
> -    //Arg0 : port
> -    //Arg1 : 0 disable, 1 enable
> -    Method(SRLP, 2, Serialized) {
> -      ShiftLeft (Arg1, 10, Local0)
> -      Switch (ToInteger(Arg0))
> -      {
> -        case (0x0){
> -          Store (0, HSEL)
> -          Store (H4L0, Local1)
> -          And (Local1, 0xfffffbff, Local1)
> -          Or (Local0, Local1, Local0)
> -          Store (Local0, H4L0)
> -        }
> -        case (0x1){
> -          Store (0, HSEL)
> -          Store (H4L1, Local1)
> -          And (Local1, 0xfffffbff, Local1)
> -          Or (Local0, Local1, Local0)
> -          Store (Local0, H4L1)
> -        }
> -        case (0x2){
> -          Store (0, HSEL)
> -          Store (H4L2, Local1)
> -          And (Local1, 0xfffffbff, Local1)
> -          Or (Local0, Local1, Local0)
> -          Store (Local0, H4L2)
> -        }
> -        case (0x3){
> -          Store (0, HSEL)
> -          Store (H4L3, Local1)
> -          And (Local1, 0xfffffbff, Local1)
> -          Or (Local0, Local1, Local0)
> -          Store (Local0, H4L3)
> -        }
> -        case (0x4){
> -          Store (3, HSEL)
> -          Store (H3L2, Local1)
> -          And (Local1, 0xfffffbff, Local1)
> -          Or (Local0, Local1, Local0)
> -          Store (Local0, H3L2)
> -        }
> -        case (0x5){
> -          Store (3, HSEL)
> -          Store (H3L3, Local1)
> -          And (Local1, 0xfffffbff, Local1)
> -          Or (Local0, Local1, Local0)
> -          Store (Local0, H3L3)
> -        }
> -      }
> -    }
> -
> -    //Reset
> -    //Arg0 : reset type (1: dsaf; 2: ppe; 3:XGE core; 4:XGE; 5:G3)
> -    //Arg1 : port
> -    //Arg2 : 0 disable, 1 enable
> -    Method(DRST, 3, Serialized)
> -    {
> -      Switch (ToInteger(Arg0))
> -      {
> -        //DSAF reset
> -        case (0x1)
> -        {
> -          Store (Arg2, Local0)
> -          If (LEqual (Local0, 0))
> -          {
> -            Store (0x1, DRTE)
> -            Store (0x1, NRTE)
> -            Sleep (10)
> -            Store (0x1, RRTE)
> -          }
> -          Else
> -          {
> -            Store (0x1, DRTD)
> -            Store (0x1, NRTD)
> -            Sleep (10)
> -            Store (0x1, RRTD)
> -          }
> -        }
> -        //Reset PPE port
> -        case (0x2)
> -        {
> -          Store (Arg1, Local0)
> -          Store (Arg2, Local1)
> -          PRST (Local0, Local1)
> -        }
> -
> -        //Reset XGE core
> -        case (0x3)
> -        {
> -          Store (Arg1, Local0)
> -          Store (Arg2, Local1)
> -          XCRT (Local0, Local1)
> -        }
> -        //Reset XGE port
> -        case (0x4)
> -        {
> -          Store (Arg1, Local0)
> -          Store (Arg2, Local1)
> -          XRST (Local0, Local1)
> -        }
> -
> -        //Reset GE port
> -        case (0x5)
> -        {
> -          Store (Arg1, Local0)
> -          Store (Arg2, Local1)
> -          GRST (Local0, Local1)
> -        }
> -      }
> -    }
> -
> -    // _DSM Device Specific Method
> -    //
> -    // Arg0: UUID Unique function identifier
> -    // Arg1: Integer Revision Level
> -    // Arg2: Integer Function Index
> -    //   0 : Return Supported Functions bit mask
> -    //   1 : Reset Sequence
> -    //    Arg3[0] : reset type (1:dsaf; 2:ppe; 3:xge core; 4:xge; 5: ge)
> -    //    Arg3[1] : port index in dsaf
> -    //    Arg3[2] : 0 reset, 1 cancle reset
> -    //   2 : Set Serdes Loopback
> -    //    Arg3[0] : port
> -    //    Arg3[1] : 0 disable, 1 enable
> -    //   3 : LED op set
> -    //    Arg3[0] : op type
> -    //    Arg3[1] : port
> -    //    Arg3[2] : para
> -    //   4 : Get port type (GE or XGE)
> -    //    Arg3[0] : port index in dsaf
> -    //    Return : 0 GE, 1 XGE
> -    //   5 : Get sfp status
> -    //    Arg3[0] : port index in dsaf
> -    //    Return : 0 no sfp, 1 have sfp
> -    // Arg3: Package Parameters
> -    Method (_DSM, 4, Serialized)
> -    {
> -      If (LEqual(Arg0,ToUUID("1A85AA1A-E293-415E-8E28-8D690A0F820A")))
> -      {
> -        If (LEqual (Arg1, 0x00))
> -        {
> -          Switch (ToInteger(Arg2))
> -          {
> -            case (0x0)
> -            {
> -              Return (Buffer () {0x3F})
> -            }
> -
> -            //Reset Sequence
> -            case (0x1)
> -            {
> -              Store (DeRefOf (Index (Arg3, 0)), Local0)
> -              Store (DeRefOf (Index (Arg3, 1)), Local1)
> -              Store (DeRefOf (Index (Arg3, 2)), Local2)
> -              DRST (Local0, Local1, Local2)
> -            }
> -
> -            //Set Serdes Loopback
> -            case (0x2)
> -            {
> -              Store (DeRefOf (Index (Arg3, 0)), Local0)
> -              Store (DeRefOf (Index (Arg3, 1)), Local1)
> -              SRLP (Local0, Local1)
> -            }
> -
> -            //LED op set
> -            case (0x3)
> -            {
> -
> -            }
> -
> -            // Get port type (GE or XGE)
> -            case (0x4)
> -            {
> -              Store (0, Local1)
> -              Store (DeRefOf (Index (Arg3, 0)), Local0)
> -              If (LLessEqual (Local0, 3))
> -              {
> -                // mac0: Hilink4 Lane0
> -                // mac1: Hilink4 Lane1
> -                // mac2: Hilink4 Lane2
> -                // mac3: Hilink4 Lane3
> -                Store (H4ST, Local1)
> -              }
> -              ElseIf (LLessEqual (Local0, 5))
> -              {
> -                // mac4: Hilink3 Lane2
> -                // mac5: Hilink3 Lane3
> -                Store (H3ST, Local1)
> -              }
> -
> -              Return (Local1)
> -            }
> -
> -            //Get sfp status
> -            case (0x5)
> -            {
> -
> -            }
> -          }
> -        }
> -      }
> -      Return (Buffer() {0x00})
> -    }
> -    Device (PRT0)
> -    {
> -      Name (_ADR, 0x0)
> -      Name (_DSD, Package () {
> -                        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -            Package () {
> -                Package () {"reg", 0},
> -                Package () {"media-type", "fiber"},
> -                        }
> -                })
> -    }
> -    Device (PRT1)
> -    {
> -      Name (_ADR, 0x1)
> -      Name (_DSD, Package () {
> -                        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -            Package () {
> -                Package () {"reg", 1},
> -                Package () {"media-type", "fiber"},
> -                        }
> -                })
> -    }
> -    Device (PRT4)
> -    {
> -      Name (_ADR, 0x4)
> -      Name (_DSD, Package () {
> -                        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -            Package () {
> -                Package () {"reg", 4},
> -                                Package () {"phy-mode", "sgmii"},
> -                Package () {"phy-addr", 0},
> -                Package () {"mdio-node", Package (){\_SB.MDIO}},
> -                Package () {"media-type", "copper"},
> -                        }
> -                })
> -    }
> -    Device (PRT5)
> -    {
> -      Name (_ADR, 0x5)
> -      Name (_DSD, Package () {
> -                        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -            Package () {
> -                Package () {"reg", 5},
> -                                Package () {"phy-mode", "sgmii"},
> -                Package () {"phy-addr", 1},
> -                Package () {"mdio-node", Package (){\_SB.MDIO}},
> -                Package () {"media-type", "copper"},
> -                        }
> -                })
> -    }
> -  }
> -  Device (ETH4) {
> -    Name(_HID, "HISI00C2")
> -    Name (_CCA, 1) // Cache-coherent controller
> -    Name (_DSD, Package () {
> -      ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -      Package () {
> -        Package () {"local-mac-address", Package () { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }}, // 6-bytes
> -        Package () {"ae-handle", Package (){\_SB.DSF0}},
> -        Package () {"port-idx-in-ae", 4},
> -      }
> -    })
> -  }
> -  Device (ETH5) {
> -    Name(_HID, "HISI00C2")
> -    Name (_CCA, 1) // Cache-coherent controller
> -    Name (_DSD, Package () {
> -      ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -      Package () {
> -        Package () {"local-mac-address", Package () { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }}, // 6-bytes
> -        Package () {"ae-handle", Package (){\_SB.DSF0}},
> -        Package () {"port-idx-in-ae", 5},
> -      }
> -    })
> -  }
> -  Device (ETH0) {
> -    Name(_HID, "HISI00C2")
> -    Name (_CCA, 1) // Cache-coherent controller
> -    Name (_DSD, Package () {
> -      ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -      Package () {
> -        Package () {"local-mac-address", Package () { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }}, // 6-bytes
> -        Package () {"ae-handle", Package (){\_SB.DSF0}},
> -        Package () {"port-idx-in-ae", 0},
> -      }
> -    })
> -  }
> -  Device (ETH1) {
> -    Name(_HID, "HISI00C2")
> -    Name (_CCA, 1) // Cache-coherent controller
> -    Name (_DSD, Package () {
> -      ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -      Package () {
> -        Package () {"local-mac-address", Package () { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }}, // 6-bytes
> -        Package () {"ae-handle", Package (){\_SB.DSF0}},
> -        Package () {"port-idx-in-ae", 1},
> -      }
> -    })
> -  }
> -
> -}
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl
> deleted file mode 100644
> index 4eaa073..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl
> +++ /dev/null
> @@ -1,125 +0,0 @@
> -/** @file
> -  Differentiated System Description Table Fields (DSDT)
> -
> -  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
> -    This program and the accompanying materials
> -  are licensed and made available under the terms and conditions of the BSD License
> -  which accompanies this distribution.  The full text of the license may be found at
> -  http://opensource.org/licenses/bsd-license.php
> -
> -  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -
> -**/
> -
> -Scope(_SB)
> -{
> -  // Mbi-gen pcie subsys
> -  Device(MBI0) {
> -    Name(_HID, "HISI0152")
> -    Name(_CID, "MBIGen")
> -    Name(_CRS, ResourceTemplate() {
> -      Memory32Fixed(ReadWrite, 0xa0080000, 0x10000)
> -    })
> -
> -   Name(_DSD, Package () {
> -        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -        Package ()
> -        {
> -          Package () {"num-pins", 2}
> -        }
> -   })
> -  }
> -
> -  // Mbi-gen sas1 intc
> -  Device(MBI1) {
> -    Name(_HID, "HISI0152")
> -    Name(_CID, "MBIGen")
> -    Name(_CRS, ResourceTemplate() {
> -      Memory32Fixed(ReadWrite, 0xa0080000, 0x10000)
> -    })
> -   Name(_DSD, Package () {
> -        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -        Package ()
> -        {
> -          Package () {"num-pins", 128}
> -        }
> -   })
> -  }
> -
> -  Device(MBI2) {          // Mbi-gen sas2 intc
> -    Name(_HID, "HISI0152")
> -    Name(_CID, "MBIGen")
> -    Name(_CRS, ResourceTemplate() {
> -      Memory32Fixed(ReadWrite, 0xa0080000, 0x10000)
> -    })
> -   Name(_DSD, Package () {
> -        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -        Package ()
> -        {
> -          Package () {"num-pins", 128}
> -        }
> -   })
> -  }
> -
> -  Device(MBI3) {          // Mbi-gen dsa0 srv intc
> -    Name(_HID, "HISI0152")
> -    Name(_CID, "MBIGen")
> -    Name(_CRS, ResourceTemplate() {
> -      Memory32Fixed(ReadWrite, 0xc0080000, 0x10000)
> -    })
> -   Name(_DSD, Package () {
> -        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -        Package ()
> -        {
> -          Package () {"num-pins", 409}
> -        }
> -   })
> -  }
> -
> -  Device(MBI4) {          // Mbi-gen dsa1 dbg0 intc
> -    Name(_HID, "HISI0152")
> -    Name(_CID, "MBIGen")
> -    Name(_CRS, ResourceTemplate() {
> -      Memory32Fixed(ReadWrite, 0xc0080000, 0x10000)
> -    })
> -   Name(_DSD, Package () {
> -        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -        Package ()
> -        {
> -          Package () {"num-pins", 9}
> -        }
> -   })
> -  }
> -
> -  Device(MBI5) {          // Mbi-gen dsa2 dbg1 intc
> -    Name(_HID, "HISI0152")
> -    Name(_CID, "MBIGen")
> -    Name(_CRS, ResourceTemplate() {
> -      Memory32Fixed(ReadWrite, 0xc0080000, 0x10000)
> -    })
> -   Name(_DSD, Package () {
> -        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -        Package ()
> -        {
> -          Package () {"num-pins", 9}
> -        }
> -   })
> -  }
> -
> -  Device(MBI6) {          // Mbi-gen dsa sas0 intc
> -    Name(_HID, "HISI0152")
> -    Name(_CID, "MBIGen")
> -    Name(_CRS, ResourceTemplate() {
> -      Memory32Fixed(ReadWrite, 0xc0080000, 0x10000)
> -    })
> -   Name(_DSD, Package () {
> -        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -        Package ()
> -        {
> -          Package () {"num-pins", 128}
> -        }
> -   })
> -  }
> -
> -}
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl
> deleted file mode 100644
> index 573c0a3..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl
> +++ /dev/null
> @@ -1,261 +0,0 @@
> -/** @file
> -*
> -*  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
> -*  Copyright (c) 2016, Hisilicon Limited. All rights reserved.
> -*  Copyright (c) 2016, Linaro Limited. All rights reserved.
> -*
> -*  This program and the accompanying materials
> -*  are licensed and made available under the terms and conditions of the BSD License
> -*  which accompanies this distribution.  The full text of the license may be found at
> -*  http://opensource.org/licenses/bsd-license.php
> -*
> -*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -*
> -*  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> -*
> -**/
> -
> -//#include "ArmPlatform.h"
> -Scope(_SB)
> -{
> -  // PCIe Root bus
> -  Device (PCI0)
> -  {
> -    Name (_HID, "HISI0080") // PCI Express Root Bridge
> -    Name (_CID, "PNP0A03") // Compatible PCI Root Bridge
> -    Name(_SEG, 0) // Segment of this Root complex
> -    Name(_BBN, 0) // Base Bus Number
> -    Name(_CCA, 1)
> -    Method (_CRS, 0, Serialized) { // Root complex resources
> -      Name (RBUF, ResourceTemplate () {
> -        WordBusNumber ( // Bus numbers assigned to this root
> -          ResourceProducer, MinFixed, MaxFixed, PosDecode,
> -          0, // AddressGranularity
> -          0x0, // AddressMinimum - Minimum Bus Number
> -          0x1f, // AddressMaximum - Maximum Bus Number
> -          0, // AddressTranslation - Set to 0
> -          0x20 // RangeLength - Number of Busses
> -        )
> -        QWordMemory ( // 64-bit BAR Windows
> -          ResourceProducer,
> -          PosDecode,
> -          MinFixed,
> -          MaxFixed,
> -          Cacheable,
> -          ReadWrite,
> -          0x0, // Granularity
> -          0xb2000000, // Min Base Address pci address
> -          0xb7feffff, // Max Base Address
> -          0x0, // Translate
> -          0x5ff0000 // Length
> -        )
> -        QWordIO (
> -          ResourceProducer,
> -          MinFixed,
> -          MaxFixed,
> -          PosDecode,
> -          EntireRange,
> -          0x0, // Granularity
> -          0x0, // Min Base Address
> -          0xffff, // Max Base Address
> -          0xb7ff0000, // Translate
> -          0x10000 // Length
> -        )
> -      }) // Name(RBUF)
> -      Return (RBUF)
> -    } // Method(_CRS)
> -
> -    Device (RES0)
> -    {
> -      Name (_HID, "HISI0081") // HiSi PCIe RC config base address
> -      Name (_CRS, ResourceTemplate (){
> -        Memory32Fixed (ReadWrite, 0xa0090000 , 0x10000)
> -      })
> -    }
> -
> -    OperationRegion(SCTR, SystemMemory, 0xa009131c, 4)
> -    Field(SCTR, AnyAcc, NoLock, Preserve) {
> -      LSTA, 32,
> -    }
> -    Method(_DSM, 0x4, Serialized) {
> -      If(LEqual(Arg0,ToUUID("6d30f553-836c-408e-b6ad-45bccc957949"))) {
> -        switch(ToInteger(Arg2))
> -        {
> -          // Function 0: Return LinkStatus
> -          case(0) {
> -              Store (0, Local0)
> -              Store (LSTA, Local0)
> -              Return (Local0)
> -          }
> -          default {
> -          }
> -        }
> -      }
> -      // If not one of the function identifiers we recognize, then return a buffer
> -      // with bit 0 set to 0 indicating no functions supported.
> -      return(Buffer(){0})
> -    }
> -  } // Device(PCI0)
> -
> -  // PCIe Root bus
> -  Device (PCI1)
> -  {
> -    Name (_HID, "HISI0080") // PCI Express Root Bridge
> -    Name (_CID, "PNP0A03") // Compatible PCI Root Bridge
> -    Name(_SEG, 1) // Segment of this Root complex
> -    Name(_BBN, 0xe0) // Base Bus Number
> -    Name(_CCA, 1)
> -    Method (_CRS, 0, Serialized) { // Root complex resources
> -      Name (RBUF, ResourceTemplate () {
> -        WordBusNumber ( // Bus numbers assigned to this root
> -          ResourceProducer, MinFixed, MaxFixed, PosDecode,
> -          0, // AddressGranularity
> -          0xe0, // AddressMinimum - Minimum Bus Number
> -          0xff, // AddressMaximum - Maximum Bus Number
> -          0,   // AddressTranslation - Set to 0
> -          0x20 // RangeLength - Number of Busses
> -        )
> -        QWordMemory ( // 64-bit BAR Windows
> -          ResourceProducer,
> -          PosDecode,
> -          MinFixed,
> -          MaxFixed,
> -          Cacheable,
> -          ReadWrite,
> -          0x0, // Granularity
> -          0xb8000000, // Min Base Address pci address
> -          0xbdfeffff, // Max Base Address
> -          0x0, // Translate
> -          0x5ff0000 // Length
> -        )
> -        QWordIO (
> -          ResourceProducer,
> -          MinFixed,
> -          MaxFixed,
> -          PosDecode,
> -          EntireRange,
> -          0x0, // Granularity
> -          0x0, // Min Base Address
> -          0xffff, // Max Base Address
> -          0xbdff0000, // Translate
> -          0x10000 // Length
> -        )
> -      }) // Name(RBUF)
> -      Return (RBUF)
> -    } // Method(_CRS)
> -
> -    Device (RES1)
> -    {
> -      Name (_HID, "HISI0081") // HiSi PCIe RC config base address
> -      Name (_CRS, ResourceTemplate (){
> -        Memory32Fixed (ReadWrite, 0xa0200000 , 0x10000)
> -      })
> -    }
> -
> -    OperationRegion(SCTR, SystemMemory, 0xa020131c, 4)
> -    Field(SCTR, AnyAcc, NoLock, Preserve) {
> -      LSTA, 32,
> -    }
> -    Method(_DSM, 0x4, Serialized) {
> -      If(LEqual(Arg0,ToUUID("6d30f553-836c-408e-b6ad-45bccc957949"))) {
> -
> -        switch(ToInteger(Arg2))
> -        {
> -          // Function 0: Return LinkStatus
> -          case(0) {
> -              Store (0, Local0)
> -              Store (LSTA, Local0)
> -              Return (Local0)
> -          }
> -          default {
> -          }
> -        }
> -      }
> -      // If not one of the function identifiers we recognize, then return a buffer
> -      // with bit 0 set to 0 indicating no functions supported.
> -      return(Buffer(){0})
> -    }
> -  } // Device(PCI1)
> -
> -  // PCIe Root bus
> -  Device (PCI2)
> -  {
> -    Name (_HID, "HISI0080") // PCI Express Root Bridge
> -    Name (_CID, "PNP0A03") // Compatible PCI Root Bridge
> -    Name(_SEG, 2) // Segment of this Root complex
> -    Name(_BBN, 0x80) // Base Bus Number
> -    Name(_CCA, 1)
> -    Method (_CRS, 0, Serialized) { // Root complex resources
> -      Name (RBUF, ResourceTemplate () {
> -        WordBusNumber ( // Bus numbers assigned to this root
> -          ResourceProducer, MinFixed, MaxFixed, PosDecode,
> -          0, // AddressGranularity
> -          0x80, // AddressMinimum - Minimum Bus Number
> -          0x9f, // AddressMaximum - Maximum Bus Number
> -          0, // AddressTranslation - Set to 0
> -          0x20 // RangeLength - Number of Busses
> -        )
> -        QWordMemory ( // 64-bit BAR Windows
> -          ResourceProducer,
> -          PosDecode,
> -          MinFixed,
> -          MaxFixed,
> -          Cacheable,
> -          ReadWrite,
> -          0x0, // Granularity
> -          0xaa000000, // Min Base Address
> -          0xaffeffff, // Max Base Address
> -          0x0, // Translate
> -          0x5ff0000 // Length
> -        )
> -        QWordIO (
> -          ResourceProducer,
> -          MinFixed,
> -          MaxFixed,
> -          PosDecode,
> -          EntireRange,
> -          0x0, // Granularity
> -          0x0, // Min Base Address
> -          0xffff, // Max Base Address
> -          0xafff0000, // Translate
> -          0x10000 // Length
> -        )
> -      }) // Name(RBUF)
> -      Return (RBUF)
> -    } // Method(_CRS)
> -
> -    Device (RES2)
> -    {
> -      Name (_HID, "HISI0081") // HiSi PCIe RC config base address
> -      Name (_CRS, ResourceTemplate (){
> -        Memory32Fixed (ReadWrite, 0xa00a0000, 0x10000)
> -      })
> -    }
> -
> -    OperationRegion(SCTR, SystemMemory, 0xa00a131c, 4)
> -    Field(SCTR, AnyAcc, NoLock, Preserve) {
> -      LSTA, 32,
> -    }
> -    Method(_DSM, 0x4, Serialized) {
> -      If(LEqual(Arg0,ToUUID("6d30f553-836c-408e-b6ad-45bccc957949")))
> -      {
> -        switch(ToInteger(Arg2))
> -        {
> -          // Function 0: Return LinkStatus
> -          case(0) {
> -              Store (0, Local0)
> -              Store (LSTA, Local0)
> -              Return (Local0)
> -          }
> -          default {
> -          }
> -        }
> -      }
> -      // If not one of the function identifiers we recognize, then return a buffer
> -      // with bit 0 set to 0 indicating no functions supported.
> -      return(Buffer(){0})
> -    }
> -  } // Device(PCI2)
> -}
> -
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl
> deleted file mode 100644
> index ce8ccd6..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl
> +++ /dev/null
> @@ -1,247 +0,0 @@
> -/** @file
> -  Differentiated System Description Table Fields (DSDT)
> -
> -  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
> -  Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
> -  Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
> -    This program and the accompanying materials
> -  are licensed and made available under the terms and conditions of the BSD License
> -  which accompanies this distribution.  The full text of the license may be found at
> -  http://opensource.org/licenses/bsd-license.php
> -
> -  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -
> -**/
> -
> -Scope(_SB)
> -{
> -    Device(SAS0) {
> -          Name(_HID, "HISI0162")
> -    Name(_CCA, 1)
> -          Name(_CRS, ResourceTemplate() {
> -                  Memory32Fixed(ReadWrite, 0xC3000000, 0x10000)
> -                  Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> -                  {
> -      64,65,66,67,68,
> -      69,70,71,72,73,
> -      75,76,77,78,79,
> -      80,81,82,83,84,
> -      85,86,87,88,89,
> -      90,91,92,93,94,
> -      95,96,97,98,99,
> -      100,101,102,103,104,
> -      105,106,107,108,109,
> -      110,111,112,113,114,
> -      115,116,117,118,119,
> -      120,121,122,123,124,
> -      125,126,127,128,129,
> -      130,131,132,133,134,
> -      135,136,137,138,139,
> -      140,141,142,143,144,
> -      145,146,147,148,149,
> -      150,151,152,153,154,
> -      155,156,157,158,159,
> -      160,
> -      }
> -
> -                  Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
> -                  {
> -      601,602,603,604,
> -      605,606,607,608,609,
> -      610,611,612,613,614,
> -      615,616,617,618,619,
> -      620,621,622,623,624,
> -      625,626,627,628,629,
> -      630,631,632,
> -      }
> -          })
> -
> -          Name (_DSD, Package () {
> -              ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -              Package () {
> -                  Package () {"interrupt-parent",Package() {\_SB.MBI6}},
> -      Package (2) {"sas-addr", Package() {50, 01, 88, 20, 16, 00, 00, 0x00}},
> -      Package () {"queue-count", 16},
> -      Package () {"phy-count", 8},
> -              }
> -          })
> -
> -    OperationRegion (CTL, SystemMemory, 0xC0000000, 0x10000)
> -    Field (CTL, AnyAcc, NoLock, Preserve)
> -    {
> -      Offset (0x338),
> -      CLK, 32,
> -      CLKD, 32,
> -      Offset (0xa60),
> -      RST, 32,
> -      DRST, 32,
> -      Offset (0x5a30),
> -      STS, 32,
> -    }
> -
> -    Method (_RST, 0x0, Serialized)
> -    {
> -      Store(0x7ffff, RST)
> -      Store(0x7ffff, CLKD)
> -      Sleep(1)
> -      Store(0x7ffff, DRST)
> -      Store(0x7ffff, CLK)
> -      Sleep(1)
> -    }
> -    }
> -
> -    Device(SAS1) {
> -          Name(_HID, "HISI0162")
> -    Name(_CCA, 1)
> -          Name(_CRS, ResourceTemplate() {
> -                  Memory32Fixed(ReadWrite, 0xA2000000, 0x10000)
> -
> -      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> -                  {
> -      64,65,66,67,68,
> -      69,70,71,72,73,
> -      75,76,77,78,79,
> -      80,81,82,83,84,
> -      85,86,87,88,89,
> -      90,91,92,93,94,
> -      95,96,97,98,99,
> -      100,101,102,103,104,
> -      105,106,107,108,109,
> -      110,111,112,113,114,
> -      115,116,117,118,119,
> -      120,121,122,123,124,
> -      125,126,127,128,129,
> -      130,131,132,133,134,
> -      135,136,137,138,139,
> -      140,141,142,143,144,
> -      145,146,147,148,149,
> -      150,151,152,153,154,
> -      155,156,157,158,159,
> -      160,
> -      }
> -
> -                  Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
> -                  {
> -         576,577,578,579,580,
> -      581,582,583,584,585,
> -      586,587,588,589,590,
> -      591,592,593,594,595,
> -      596,597,598,599,600,
> -      601,602,603,604,605,
> -      606,607,
> -      }
> -          })
> -
> -          Name (_DSD, Package () {
> -              ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -              Package () {
> -                  Package () {"interrupt-parent",Package() {\_SB.MBI1}},
> -                  Package (2) {"sas-addr", Package() {50, 01, 88, 20, 16, 00, 00, 00}},
> -                  Package () {"queue-count", 16},
> -                  Package () {"phy-count", 8},
> -                  Package () {"hip06-sas-v2-quirk-amt", 1},
> -              }
> -          })
> -
> -    OperationRegion (CTL, SystemMemory, 0xA0000000, 0x10000)
> -    Field (CTL, AnyAcc, NoLock, Preserve)
> -    {
> -      Offset (0x318),
> -      CLK, 32,
> -      CLKD, 32,
> -      Offset (0xa18),
> -      RST, 32,
> -      DRST, 32,
> -      Offset (0x5a0c),
> -      STS, 32,
> -    }
> -
> -    Method (_RST, 0x0, Serialized)
> -    {
> -      Store(0x7ffff, RST)
> -      Store(0x7ffff, CLKD)
> -      Sleep(1)
> -      Store(0x7ffff, DRST)
> -      Store(0x7ffff, CLK)
> -      Sleep(1)
> -    }
> -    }
> -
> -    Device(SAS2) {
> -          Name(_HID, "HISI0162")
> -    Name(_CCA, 1)
> -          Name(_CRS, ResourceTemplate() {
> -                  Memory32Fixed(ReadWrite, 0xA3000000, 0x10000)
> -
> -      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> -                  {
> -      192,193,194,195,196,
> -      197,198,199,200,201,
> -      202,203,204,205,206,
> -      207,208,209,210,211,
> -      212,213,214,215,216,
> -      217,218,219,220,221,
> -      222,223,224,225,226,
> -      227,228,229,230,231,
> -      232,233,234,235,236,
> -      237,238,239,240,241,
> -      242,243,244,245,246,
> -      247,248,249,250,251,
> -      252,253,254,255,256,
> -      257,258,259,260,261,
> -      262,263,264,265,266,
> -      267,268,269,270,271,
> -      272,273,274,275,276,
> -      277,278,279,280,281,
> -      282,283,284,285,286,
> -      287,
> -      }
> -
> -                  Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
> -                  {
> -      608,609,610,611,
> -      612,613,614,615,616,
> -      617,618,619,620,621,
> -      622,623,624,625,626,
> -      627,628,629,630,631,
> -      632,633,634,635,636,
> -      637,638,639,
> -      }
> -          })
> -
> -          Name (_DSD, Package () {
> -              ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -              Package () {
> -                  Package () {"interrupt-parent",Package() {\_SB.MBI2}},
> -      Package (2) {"sas-addr", Package() {50, 01, 88, 20, 16, 00, 00, 00}},
> -      Package () {"queue-count", 16},
> -      Package () {"phy-count", 8},
> -              }
> -          })
> -
> -    OperationRegion (CTL, SystemMemory, 0xA0000000, 0x10000)
> -    Field (CTL, AnyAcc, NoLock, Preserve)
> -    {
> -      Offset (0x3a8),
> -      CLK, 32,
> -      CLKD, 32,
> -      Offset (0xae0),
> -      RST, 32,
> -      DRST, 32,
> -      Offset (0x5a70),
> -      STS, 32,
> -    }
> -
> -    Method (_RST, 0x0, Serialized)
> -    {
> -      Store(0x7ffff, RST)
> -      Store(0x7ffff, CLKD)
> -      Sleep(1)
> -      Store(0x7ffff, DRST)
> -      Store(0x7ffff, CLK)
> -      Sleep(1)
> -    }
> -    }
> -
> -}
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl
> deleted file mode 100644
> index 28ba03d..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl
> +++ /dev/null
> @@ -1,136 +0,0 @@
> -/** @file
> -  Differentiated System Description Table Fields (DSDT)
> -
> -  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
> -  Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
> -  Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
> -    This program and the accompanying materials
> -  are licensed and made available under the terms and conditions of the BSD License
> -  which accompanies this distribution.  The full text of the license may be found at
> -  http://opensource.org/licenses/bsd-license.php
> -
> -  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -
> -  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> -
> -**/
> -
> -//#include "ArmPlatform.h"
> -Scope(_SB)
> -{
> -  Device (USB0)
> -        {
> -            Name (_HID, "PNP0D20")  // _HID: Hardware ID
> -            Name (_CID, "HISI0D2" /* EHCI USB Controller without debug */)  // _CID: Compatible ID
> -            Name (_CCA, One)  // _CCA: Cache Coherency Attribute
> -            Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
> -            {
> -                Name (RBUF, ResourceTemplate ()
> -                {
> -                    Memory32Fixed (ReadWrite,
> -                        0xa7020000,         // Address Base
> -                        0x00010000,         // Address Length
> -                        )
> -                    Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> -                    {
> -                        0x00000041,
> -                    }
> -                })
> -                Return (RBUF) /* \_SB_.USB0._CRS.RBUF */
> -            }
> -
> -     Name (_DSD, Package () {
> -              ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -              Package ()
> -              {
> -                  Package () {"interrupt-parent",Package() {\_SB.MBI0}}
> -              }
> -     })
> -
> -            Device (RHUB)
> -            {
> -                Name (_ADR, Zero)  // _ADR: Address
> -                Device (PRT1)
> -                {
> -                    Name (_ADR, One)  // _ADR: Address
> -                    Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
> -                    {
> -                        0xFF,
> -                        Zero,
> -                        Zero,
> -                        Zero
> -                    })
> -                    Name (_PLD, Package (0x01)  // _PLD: Physical Location of Device
> -                    {
> -                        ToPLD (
> -                            PLD_Revision       = 0x1,
> -                            PLD_IgnoreColor    = 0x1,
> -                            PLD_Red            = 0x0,
> -                            PLD_Green          = 0x0,
> -                            PLD_Blue           = 0x0,
> -                            PLD_Width          = 0x0,
> -                            PLD_Height         = 0x0,
> -                            PLD_UserVisible    = 0x1,
> -                            PLD_Dock           = 0x0,
> -                            PLD_Lid            = 0x0,
> -                            PLD_Panel          = "UNKNOWN",
> -                            PLD_VerticalPosition = "UPPER",
> -                            PLD_HorizontalPosition = "LEFT",
> -                            PLD_Shape          = "UNKNOWN",
> -                            PLD_GroupOrientation = 0x0,
> -                            PLD_GroupToken     = 0x0,
> -                            PLD_GroupPosition  = 0x0,
> -                            PLD_Bay            = 0x0,
> -                            PLD_Ejectable      = 0x0,
> -                            PLD_EjectRequired  = 0x0,
> -                            PLD_CabinetNumber  = 0x0,
> -                            PLD_CardCageNumber = 0x0,
> -                            PLD_Reference      = 0x0,
> -                            PLD_Rotation       = 0x0,
> -                            PLD_Order          = 0x0,
> -                            PLD_VerticalOffset = 0x0,
> -                            PLD_HorizontalOffset = 0x0)
> -
> -                    })
> -                }
> -
> -                Device (PRT2)
> -                {
> -                    Name (_ADR, 0x02)  // _ADR: Address
> -                    Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
> -                    {
> -                        Zero,
> -                        0xFF,
> -                        Zero,
> -                        Zero
> -                    })
> -                }
> -
> -                Device (PRT3)
> -                {
> -                    Name (_ADR, 0x03)  // _ADR: Address
> -                    Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
> -                    {
> -                        Zero,
> -                        0xFF,
> -                        Zero,
> -                        Zero
> -                    })
> -                }
> -
> -                Device (PRT4)
> -                {
> -                    Name (_ADR, 0x04)  // _ADR: Address
> -                    Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
> -                    {
> -                        Zero,
> -                        0xFF,
> -                        Zero,
> -                        Zero
> -                    })
> -                }
> -            }
> -        }
> -}
> -
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl
> deleted file mode 100644
> index 06c05aa..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl
> +++ /dev/null
> @@ -1,29 +0,0 @@
> -/** @file
> -  Differentiated System Description Table Fields (DSDT)
> -
> -  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
> -  Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
> -  Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
> -    This program and the accompanying materials
> -  are licensed and made available under the terms and conditions of the BSD License
> -  which accompanies this distribution.  The full text of the license may be found at
> -  http://opensource.org/licenses/bsd-license.php
> -
> -  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -
> -  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> -
> -**/
> -
> -#include "Pv660Platform.h"
> -
> -DefinitionBlock("DsdtTable.aml", "DSDT", 1, "HISI", "HISI-EVB", EFI_ACPI_ARM_OEM_REVISION) {
> -     include ("Lpc.asl")
> -     include ("D03Mbig.asl")
> -     include ("CPU.asl")
> -     include ("D03Usb.asl")
> -     include ("D03Hns.asl")
> -     include ("D03Sas.asl")
> -     include ("D03Pci.asl")
> -}
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl
> deleted file mode 100644
> index 0965afc..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -/** @file
> -*
> -*  Copyright (c) 2016 Hisilicon Limited. All rights reserved.
> -*
> -*  This program and the accompanying materials
> -*  are licensed and made available under the terms and conditions of the BSD License
> -*  which accompanies this distribution.  The full text of the license may be found at
> -*  http://opensource.org/licenses/bsd-license.php
> -*
> -*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -*
> -**/
> -
> -//
> -// LPC
> -//
> -
> -Device (LPC0)
> -{
> -  Name(_HID, "HISI0191")  // HiSi LPC
> -  Name (_CRS, ResourceTemplate () {
> -    Memory32Fixed (ReadWrite, 0xa01b0000, 0x1000)
> -  })
> -}
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sas.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sas.asl
> deleted file mode 100644
> index 4c3c642..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sas.asl
> +++ /dev/null
> @@ -1,152 +0,0 @@
> -/** @file
> -  Differentiated System Description Table Fields (DSDT)
> -
> -  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
> -    This program and the accompanying materials
> -  are licensed and made available under the terms and conditions of the BSD License
> -  which accompanies this distribution.  The full text of the license may be found at
> -  http://opensource.org/licenses/bsd-license.php
> -
> -  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -
> -**/
> -
> -Scope(_SB)
> -{
> -    Device(SAS0) {
> -          Name(_HID, "HISI0161")
> -    Name(_CCA, 1)
> -          Name(_CRS, ResourceTemplate() {
> -                  Memory32Fixed(ReadWrite, 0xc1000000, 0x10000)
> -                  Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> -                  {
> -      //phy irq(0~79)
> -      259,263,264,
> -      269,273,274,
> -      279,283,284,
> -      289,293,294,
> -      299,303,304,
> -      309,313,314,
> -      319,323,324,
> -      329,333,334,
> -      }
> -
> -                  Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
> -                  {
> -      //cq irq (80~111)
> -      336,337,338,339,340,341,342,343,
> -      344,345,346,347,348,349,350,351,
> -      352,353,354,355,356,357,358,359,
> -      360,361,362,363,364,365,366,367,
> -      }
> -
> -                  Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> -                  {
> -      376, //chip fatal error irq(120)
> -      381, //chip fatal error irq(125)
> -                  }
> -          })
> -
> -          Name (_DSD, Package () {
> -              ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -              Package () {
> -                  Package () {"interrupt-parent",Package() {\_SB.MBI1}},
> -      Package (2) {"sas-addr", Package() {50, 01, 88, 20, 16, 00, 00, 0x0a}},
> -      Package () {"queue-count", 32},
> -      Package () {"phy-count", 8},
> -              }
> -          })
> -
> -    OperationRegion (CTL, SystemMemory, 0xC0000000, 0x10000)
> -    Field (CTL, AnyAcc, NoLock, Preserve)
> -    {
> -      Offset (0x338),
> -      CLK, 32,
> -      CLKD, 32,
> -      Offset (0xa60),
> -      RST, 32,
> -      DRST, 32,
> -      Offset (0x5a30),
> -      STS, 32,
> -    }
> -
> -    Method (_RST, 0x0, Serialized)
> -    {
> -      Store(0x7ffff, RST)
> -      Store(0x7ffff, CLKD)
> -      Sleep(1)
> -      Store(0x7ffff, DRST)
> -      Store(0x7ffff, CLK)
> -      Sleep(1)
> -    }
> -    }
> -
> -    Device(SAS1) {
> -          Name(_HID, "HISI0161")
> -    Name(_CCA, 1)
> -          Name(_CRS, ResourceTemplate() {
> -                  Memory32Fixed(ReadWrite, 0xb1000000, 0x10000)
> -                  Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> -                  {
> -      //phy irq(0~79)
> -      259,263,264,
> -      269,273,274,
> -      279,283,284,
> -      289,293,294,
> -      299,303,304,
> -      309,313,314,
> -      319,323,324,
> -      329,333,334,
> -      }
> -
> -                  Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
> -                  {
> -      //cq irq (80~111)
> -      336,337,338,339,340,341,342,343,
> -      344,345,346,347,348,349,350,351,
> -      352,353,354,355,356,357,358,359,
> -      360,361,362,363,364,365,366,367,
> -      }
> -
> -                  Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
> -                  {
> -      376, //chip fatal error irq(120)
> -      381, //chip fatal error irq(125)
> -                  }
> -          })
> -
> -          Name (_DSD, Package () {
> -              ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -              Package () {
> -                  Package () {"interrupt-parent",Package() {\_SB.MBI3}},
> -      Package (2) {"sas-addr", Package() {50, 01, 88, 20, 16, 00, 00, 00}},
> -      Package () {"queue-count", 32},
> -      Package () {"phy-count", 8},
> -              }
> -          })
> -
> -    OperationRegion (CTL, SystemMemory, 0xB0000000, 0x10000)
> -    Field (CTL, AnyAcc, NoLock, Preserve)
> -    {
> -      Offset (0x318),
> -      CLK, 32,
> -      CLKD, 32,
> -      Offset (0xa18),
> -      RST, 32,
> -      DRST, 32,
> -      Offset (0x5a0c),
> -      STS, 32,
> -    }
> -
> -    Method (_RST, 0x0, Serialized)
> -    {
> -      Store(0x7ffff, RST)
> -      Store(0x7ffff, CLKD)
> -      Sleep(1)
> -      Store(0x7ffff, DRST)
> -      Store(0x7ffff, CLK)
> -      Sleep(1)
> -    }
> -    }
> -}
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sata.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sata.asl
> deleted file mode 100644
> index 9ad2d96..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sata.asl
> +++ /dev/null
> @@ -1,39 +0,0 @@
> -/** @file
> -*
> -*  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
> -*  Copyright (c) 2015, Hisilicon Limited. All rights reserved.
> -*  Copyright (c) 2015, Linaro Limited. All rights reserved.
> -*
> -*  This program and the accompanying materials
> -*  are licensed and made available under the terms and conditions of the BSD License
> -*  which accompanies this distribution.  The full text of the license may be found at
> -*  http://opensource.org/licenses/bsd-license.php
> -*
> -*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -*
> -*  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> -*
> -**/
> -
> -//
> -// SATA AHCI
> -//
> -
> -Device (AHCI)
> -{
> -  Name(_HID, "HISI0001")  // HiSi AHCI
> -  Name (_CCA, 1)           // Cache-coherent controller
> -  Name (_CRS, ResourceTemplate () {
> -    Memory32Fixed (ReadWrite, 0xb1002800, 0x00000B00)
> -    Memory32Fixed (ReadWrite, 0xb1000000, 0x00002800)
> -    Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive,,,) { 382 }
> -  })
> -
> -  Name (_DSD, Package () {
> -    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
> -    Package () {
> -      Package () {"interrupt-parent",Package() {\_SB.MBI3}}
> -    }
> -  })
> -}
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc b/Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc
> deleted file mode 100644
> index 6e8557e..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc
> +++ /dev/null
> @@ -1,128 +0,0 @@
> -/** @file
> -*  Multiple APIC Description Table (MADT)
> -*
> -*  Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
> -*  Copyright (c) 2015, Hisilicon Limited. All rights reserved.
> -*  Copyright (c) 2015, Linaro Limited. All rights reserved.
> -*
> -*  This program and the accompanying materials
> -*
> -*  This program and the accompanying materials
> -*  are licensed and made available under the terms and conditions of the BSD License
> -*  which accompanies this distribution.  The full text of the license may be found at
> -*  http://opensource.org/licenses/bsd-license.php
> -*
> -*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -*
> -*  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> -*
> -**/
> -
> -#include "Pv660Platform.h"
> -
> -#include <Library/AcpiLib.h>
> -#include <Library/ArmLib.h>
> -#include <Library/PcdLib.h>
> -#include <IndustryStandard/Acpi.h>
> -#include <Library/AcpiNextLib.h>
> -
> -// Differs from Juno, we have another affinity level beyond cluster and core
> -// 0x20000 is only for socket 0
> -#define PLATFORM_GET_MPID(ClusterId, CoreId)   (0x10000 | ((ClusterId) << 8) | (CoreId))
> -
> -//
> -// Multiple APIC Description Table
> -//
> -#pragma pack (1)
> -
> -typedef struct {
> -  EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
> -  EFI_ACPI_5_1_GIC_STRUCTURE                            GicInterfaces[16];
> -  EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;
> -  EFI_ACPI_6_0_GIC_ITS_STRUCTURE                      GicITS[1];
> -} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
> -
> -#pragma pack ()
> -
> -EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
> -  {
> -    ARM_ACPI_HEADER (
> -      EFI_ACPI_1_0_APIC_SIGNATURE,
> -      EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE,
> -      EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
> -    ),
> -    //
> -    // MADT specific fields
> -    //
> -    0, // LocalApicAddress
> -    0, // Flags
> -  },
> -  {
> -    // Format: EFI_ACPI_5_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Flags, PmuIrq, GicBase, GicVBase, GicHBase,
> -    //                                          GsivId, GicRBase, Mpidr)
> -    // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GICC Structure of
> -    //       ACPI v5.1).
> -    //       The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses
> -    //       the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        0, 0, PLATFORM_GET_MPID(0, 0),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x100000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        1, 1, PLATFORM_GET_MPID(0, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x130000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        2, 2, PLATFORM_GET_MPID(0, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x160000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        3, 3, PLATFORM_GET_MPID(0, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x190000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        4, 4, PLATFORM_GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x1C0000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        5, 5, PLATFORM_GET_MPID(1, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x1F0000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        6, 6, PLATFORM_GET_MPID(1, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x220000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        7, 7, PLATFORM_GET_MPID(1, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x250000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        8, 8, PLATFORM_GET_MPID(2, 0),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x280000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        9, 9, PLATFORM_GET_MPID(2, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x2B0000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        10, 10, PLATFORM_GET_MPID(2, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x2E0000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        11, 11, PLATFORM_GET_MPID(2, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x310000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        12, 12, PLATFORM_GET_MPID(3, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x340000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        13, 13, PLATFORM_GET_MPID(3, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x370000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        14, 14, PLATFORM_GET_MPID(3, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x3A0000 /* GicRBase */),
> -    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
> -        15, 15, PLATFORM_GET_MPID(3, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
> -        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x3D0000 /* GicRBase */),
> -  },
> -
> -  EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0, 0x4),
> -  {
> -    EFI_ACPI_6_0_GIC_ITS_INIT(0,0xC6000000),
> -  }
> -};
> -
> -//
> -// Reference the table being generated to prevent the optimizer from removing the
> -// data structure from the executable
> -//
> -VOID* CONST ReferenceAcpiTable = &Madt;
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Slit.aslc b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Slit.aslc
> deleted file mode 100644
> index 2fa2959..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Slit.aslc
> +++ /dev/null
> @@ -1,81 +0,0 @@
> -/*
> - * Copyright (c) 2013 Linaro Limited
> - *
> - * All rights reserved. This program and the accompanying materials
> - * are made available under the terms of the BSD License which accompanies
> - * this distribution, and is available at
> - * http://opensource.org/licenses/bsd-license.php
> - *
> - * Contributors:
> - *     Yi Li - yi.li@linaro.org
> -*/
> -
> -#include <IndustryStandard/Acpi.h>
> -#include "Pv660Platform.h"
> -
> -#define EFI_ACPI_SYSTEM_LOCALITIES_ENTRY_COUNT 0x0000000000000014
> -
> -#pragma pack(1)
> -typedef struct {
> -  UINT8   Entry[EFI_ACPI_SYSTEM_LOCALITIES_ENTRY_COUNT];
> -} EFI_ACPI_5_0_NUMBER_OF_SYSTEM_LOCALITIES_STRUCTURE;
> -
> -typedef struct {
> -  EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER    Header;
> -  EFI_ACPI_5_0_NUMBER_OF_SYSTEM_LOCALITIES_STRUCTURE                NumSlit[EFI_ACPI_SYSTEM_LOCALITIES_ENTRY_COUNT];
> -
> -} EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE;
> -#pragma pack()
> -
> -//
> -// System Locality Information Table
> -// Please modify all values in Slit.h only.
> -//
> -EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE Slit = {
> -  {
> -    {
> -      EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE,
> -      sizeof (EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE),
> -      EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION,
> -      0x00,                                                     // Checksum will be updated at runtime
> -      {EFI_ACPI_ARM_OEM_ID},
> -      EFI_ACPI_ARM_OEM_TABLE_ID,
> -      EFI_ACPI_ARM_OEM_REVISION,
> -      EFI_ACPI_ARM_CREATOR_ID,
> -      EFI_ACPI_ARM_CREATOR_REVISION,
> -    },
> -    //
> -    // Beginning of SLIT specific fields
> -    //
> -    EFI_ACPI_SYSTEM_LOCALITIES_ENTRY_COUNT,
> -  },
> -  {
> -    {{0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27}}, //Locality   0
> -    {{0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26}}, //Locality   1
> -    {{0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25}}, //Locality   2
> -    {{0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23, 0x24}}, //Locality   3
> -    {{0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23}}, //Locality   4
> -    {{0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22}}, //Locality   5
> -    {{0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21}}, //Locality   6
> -    {{0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20}}, //Locality   7
> -    {{0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F}}, //Locality   8
> -    {{0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E}}, //Locality   9
> -    {{0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D}}, //Locality   10
> -    {{0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C}}, //Locality   11
> -    {{0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B}}, //Locality   12
> -    {{0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A}}, //Locality   13
> -    {{0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19}}, //Locality   14
> -    {{0x23, 0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18}}, //Locality   15
> -    {{0x24, 0x23, 0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17}}, //Locality   16
> -    {{0x25, 0x24, 0x23, 0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16}}, //Locality   17
> -    {{0x26, 0x25, 0x24, 0x23, 0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10}}, //Locality   18
> -    {{0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A}}, //Locality   19
> -  },
> -};
> -
> -//
> -// Reference the table being generated to prevent the optimizer from removing the
> -// data structure from the executable
> -//
> -VOID* CONST ReferenceAcpiTable = &Slit;
> -
> diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Srat.aslc b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Srat.aslc
> deleted file mode 100644
> index 1d38191..0000000
> --- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Srat.aslc
> +++ /dev/null
> @@ -1,115 +0,0 @@
> -/*
> - * Copyright (c) 2013 Linaro Limited
> - *
> - * All rights reserved. This program and the accompanying materials
> - * are made available under the terms of the BSD License which accompanies
> - * this distribution, and is available at
> - * http://opensource.org/licenses/bsd-license.php
> - *
> - * Contributors:
> - *     Yi Li - yi.li@linaro.org
> - *
> - *  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
> -*/
> -
> -#include <IndustryStandard/Acpi.h>
> -#include "Pv660Platform.h"
> -#include <Library/AcpiLib.h>
> -#include <Library/AcpiNextLib.h>
> -
> -
> -//
> -// Define the number of each table type.
> -// This is where the table layout is modified.
> -//
> -#define EFI_ACPI_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE_COUNT  4
> -#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT                      4
> -
> -
> -#pragma pack(1)
> -typedef struct {
> -  EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER          Header;
> -  EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE  Apic;
> -  EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE                      Memory[2];
> -  EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE                        GICC[16];
> -} EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE;
> -
> -#pragma pack()
> -
> -
> -//
> -// Static Resource Affinity Table definition
> -//
> -EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE Srat = {
> -  {
> -    {EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE,
> -    sizeof (EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE),
> -    EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION,
> -    0x00,                                                     // Checksum will be updated at runtime
> -    {EFI_ACPI_ARM_OEM_ID},
> -    EFI_ACPI_ARM_OEM_TABLE_ID,
> -    EFI_ACPI_ARM_OEM_REVISION,
> -    EFI_ACPI_ARM_CREATOR_ID,
> -    EFI_ACPI_ARM_CREATOR_REVISION},
> -    /*Reserved*/
> -    0x00000001,                                  // Reserved to be 1 for backward compatibility
> -    EFI_ACPI_RESERVED_QWORD
> -  },
> -  /**/
> -  {
> -      0x00,                                     // Subtable Type:Processor Local APIC/SAPIC Affinity
> -      sizeof(EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE),                                     //Length
> -      0x00,                                     //Proximity Domain Low(8)
> -      0x00,                                     //Apic ID
> -      0x00000001,                               //Flags
> -      0x00,                                     //Local Sapic EID
> -      {0,0,0},                                     //Proximity Domain High(24)
> -      0x00000000,                               //ClockDomain
> -  },
> -  //
> -  //
> -  // Memory Affinity
> -  //
> -  {
> -    EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000000,0x00000000,0x40000000,0x00000000,0x00000001),
> -    EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE_INIT(0x00000000,0x40000000,0x00000002,0xC0000000,0x00000001,0x00000001),
> -  },
> -
> -  /*Processor Local x2APIC Affinity*/
> -  //{
> -  //   0x02,                                              // Subtable Type:Processor Local x2APIC Affinity
> -  //   sizeof(EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE),
> -  //   {0,0},                                             //Reserved1
> -  //   0x00000000,                                        //Proximity Domain
> -  //   0x00000000,                                        //Apic ID
> -  //   0x00000001,                                        //Flags
> -  //   0x00000000,                                        //Clock Domain
> -  //   {0,0,0,0},                                         //Reserved2
> -  //},
> -
> -  {
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000000,0x00000001,0x00000000),   //GICC Affinity Processor 0
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000001,0x00000001,0x00000000),   //GICC Affinity Processor 1
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000002,0x00000001,0x00000000),   //GICC Affinity Processor 2
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000003,0x00000001,0x00000000),   //GICC Affinity Processor 3
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000004,0x00000001,0x00000000),   //GICC Affinity Processor 4
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000005,0x00000001,0x00000000),   //GICC Affinity Processor 5
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000006,0x00000001,0x00000000),   //GICC Affinity Processor 6
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000007,0x00000001,0x00000000),   //GICC Affinity Processor 7
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000008,0x00000001,0x00000000),   //GICC Affinity Processor 8
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000009,0x00000001,0x00000000),   //GICC Affinity Processor 9
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000A,0x00000001,0x00000000),   //GICC Affinity Processor 10
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000B,0x00000001,0x00000000),   //GICC Affinity Processor 11
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000C,0x00000001,0x00000000),   //GICC Affinity Processor 12
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000D,0x00000001,0x00000000),   //GICC Affinity Processor 13
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000E,0x00000001,0x00000000),   //GICC Affinity Processor 14
> -    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000F,0x00000001,0x00000000)    //GICC Affinity Processor 15
> -  },
> -};
> -
> -//
> -// Reference the table being generated to prevent the optimizer from removing the
> -// data structure from the executable
> -//
> -VOID* CONST ReferenceAcpiTable = &Srat;
> -
> -- 
> 1.9.1
>

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diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf b/Chips/Hisilicon/Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf
deleted file mode 100644
index b6be3d9..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/AcpiTablesHi1610.inf
+++ /dev/null
@@ -1,56 +0,0 @@ 
-## @file
-#
-#  ACPI table data and ASL sources required to boot the platform.
-#
-#  Copyright (c) 2014, ARM Ltd. All rights reserved.
-#  Copyright (c) 2015, Hisilicon Limited. All rights reserved.
-#  Copyright (c) 2015, Linaro Limited. All rights reserved.
-#
-#  This program and the accompanying materials
-#  are licensed and made available under the terms and conditions of the BSD License
-#  which accompanies this distribution.  The full text of the license may be found at
-#  http://opensource.org/licenses/bsd-license.php
-#
-#  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-#  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
-#
-##
-
-[Defines]
-  INF_VERSION                    = 0x00010005
-  BASE_NAME                      = Hi1610AcpiTables
-  FILE_GUID                      = 7E374E25-8E01-4FEE-87F2-390C23C606CD
-  MODULE_TYPE                    = USER_DEFINED
-  VERSION_STRING                 = 1.0
-
-[Sources]
-  Dsdt/DsdtHi1610.asl
-  Facs.aslc
-  Fadt.aslc
-  Gtdt.aslc
-  MadtHi1610.aslc
-  D03Mcfg.aslc
-  D03Iort.asl
-
-[Packages]
-  ArmPkg/ArmPkg.dec
-  ArmPlatformPkg/ArmPlatformPkg.dec
-  EmbeddedPkg/EmbeddedPkg.dec
-  MdePkg/MdePkg.dec
-  MdeModulePkg/MdeModulePkg.dec
-
-  OpenPlatformPkg/Chips/Hisilicon/HisiPkg.dec
-
-[FixedPcd]
-  gArmPlatformTokenSpaceGuid.PcdCoreCount
-  gArmTokenSpaceGuid.PcdGicDistributorBase
-  gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase
-
-  gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum
-  gArmTokenSpaceGuid.PcdArmArchTimerIntrNum
-  gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum
-  gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum
-  gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase
-
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl
deleted file mode 100644
index 07660df..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Iort.asl
+++ /dev/null
@@ -1,337 +0,0 @@ 
-/*
- * Intel ACPI Component Architecture
- * iASL Compiler/Disassembler version 20151124-64
- * Copyright (c) 2000 - 2015 Intel Corporation
- *
- * Template for [IORT] ACPI Table (static data table)
- * Format: [ByteLength]  FieldName : HexFieldValue
- */
-[0004]                          Signature : "IORT"    [IO Remapping Table]
-[0004]                       Table Length : 0000029e
-[0001]                           Revision : 00
-[0001]                           Checksum : BC
-[0006]                             Oem ID : "HISI "
-[0008]                       Oem Table ID : "D03"
-[0004]                       Oem Revision : 00000000
-[0004]                    Asl Compiler ID : "INTL"
-[0004]              Asl Compiler Revision : 20150410
-
-[0004]                         Node Count : 00000008
-[0004]                        Node Offset : 00000034
-[0004]                           Reserved : 00000000
-[0004]                   Optional Padding : 00 00 00 00
-
-/* ITS 0, for dsa */
-[0001]                               Type : 00
-[0002]                             Length : 0018
-[0001]                           Revision : 00
-[0004]                           Reserved : 00000000
-[0004]                      Mapping Count : 00000000
-[0004]                     Mapping Offset : 00000000
-
-[0004]                           ItsCount : 00000001
-[0004]                        Identifiers : 00000000
-
-/* mbi-gen dsa  mbi0 - usb, named component */
-[0001]                               Type : 01
-[0002]                             Length : 0046
-[0001]                           Revision : 00
-[0004]                           Reserved : 00000000
-[0004]                      Mapping Count : 00000001
-[0004]                     Mapping Offset : 00000032
-
-[0004]                         Node Flags : 00000000
-[0008]                  Memory Properties : [IORT Memory Access Properties]
-[0004]                    Cache Coherency : 00000000
-[0001]              Hints (decoded below) : 00
-                                Transient : 0
-                           Write Allocate : 0
-                            Read Allocate : 0
-                                 Override : 0
-[0002]                           Reserved : 0000
-[0001]       Memory Flags (decoded below) : 00
-                                Coherency : 0
-                         Device Attribute : 0
-[0001]                  Memory Size Limit : 00
-[0017]                        Device Name : "\_SB_.MBI0"
-[0004]                            Padding : 00 00 00 00
-
-[0004]                         Input base : 00000000
-[0004]                           ID Count : 00000001
-[0004]                        Output Base : 00040080  // device id
-[0004]                   Output Reference : 00000034  // point to its dsa
-[0004]              Flags (decoded below) : 00000000
-                           Single Mapping : 1
-
-/* mbi-gen dsa mbi1 - sas1, named component */
-[0001]                               Type : 01
-[0002]                             Length : 0046
-[0001]                           Revision : 00
-[0004]                           Reserved : 00000000
-[0004]                      Mapping Count : 00000001
-[0004]                     Mapping Offset : 00000032
-
-[0004]                         Node Flags : 00000000
-[0008]                  Memory Properties : [IORT Memory Access Properties]
-[0004]                    Cache Coherency : 00000000
-[0001]              Hints (decoded below) : 00
-                                Transient : 0
-                           Write Allocate : 0
-                            Read Allocate : 0
-                                 Override : 0
-[0002]                           Reserved : 0000
-[0001]       Memory Flags (decoded below) : 00
-                                Coherency : 0
-                         Device Attribute : 0
-[0001]                  Memory Size Limit : 00
-[0016]                        Device Name : "\_SB_.MBI1"
-[0004]                            Padding : 00 00 00 00
-
-[0004]                         Input base : 00000000
-[0004]                           ID Count : 00000001
-[0004]                        Output Base : 00040000
-[0004]                   Output Reference : 00000034
-[0004]              Flags (decoded below) : 00000000
-                           Single Mapping : 1
-
-/* mbi-gen dsa mbi2 - sas2, named component */
-[0001]                               Type : 01
-[0002]                             Length : 0046
-[0001]                           Revision : 00
-[0004]                           Reserved : 00000000
-[0004]                      Mapping Count : 00000001
-[0004]                     Mapping Offset : 00000032
-
-[0004]                         Node Flags : 00000000
-[0008]                  Memory Properties : [IORT Memory Access Properties]
-[0004]                    Cache Coherency : 00000000
-[0001]              Hints (decoded below) : 00
-                                Transient : 0
-                           Write Allocate : 0
-                            Read Allocate : 0
-                                 Override : 0
-[0002]                           Reserved : 0000
-[0001]       Memory Flags (decoded below) : 00
-                                Coherency : 0
-                         Device Attribute : 0
-[0001]                  Memory Size Limit : 00
-[0016]                        Device Name : "\_SB_.MBI2"
-[0004]                            Padding : 00 00 00 00
-
-[0004]                         Input base : 00000000
-[0004]                           ID Count : 00000001
-[0004]                        Output Base : 00040040
-[0004]                   Output Reference : 00000034
-[0004]              Flags (decoded below) : 00000000
-                           Single Mapping : 1
-
-/* mbi-gen dsa mbi3 - dsa0, srv named component */
-[0001]                               Type : 01
-[0002]                             Length : 0046
-[0001]                           Revision : 00
-[0004]                           Reserved : 00000000
-[0004]                      Mapping Count : 00000001
-[0004]                     Mapping Offset : 00000032
-
-[0004]                         Node Flags : 00000000
-[0008]                  Memory Properties : [IORT Memory Access Properties]
-[0004]                    Cache Coherency : 00000000
-[0001]              Hints (decoded below) : 00
-                                Transient : 0
-                           Write Allocate : 0
-                            Read Allocate : 0
-                                 Override : 0
-[0002]                           Reserved : 0000
-[0001]       Memory Flags (decoded below) : 00
-                                Coherency : 0
-                         Device Attribute : 0
-[0001]                  Memory Size Limit : 00
-[0016]                        Device Name : "\_SB_.MBI3"
-[0004]                            Padding : 00 00 00 00
-
-[0004]                         Input base : 00000000
-[0004]                           ID Count : 00000001
-[0004]                        Output Base : 00040800
-[0004]                   Output Reference : 00000034
-[0004]              Flags (decoded below) : 00000000
-                           Single Mapping : 1
-
-/* mbi-gen dsa mbi4 - dsa1, dbg0 named component */
-[0001]                               Type : 01
-[0002]                             Length : 0046
-[0001]                           Revision : 00
-[0004]                           Reserved : 00000000
-[0004]                      Mapping Count : 00000001
-[0004]                     Mapping Offset : 00000032
-
-[0004]                         Node Flags : 00000000
-[0008]                  Memory Properties : [IORT Memory Access Properties]
-[0004]                    Cache Coherency : 00000000
-[0001]              Hints (decoded below) : 00
-                                Transient : 0
-                           Write Allocate : 0
-                            Read Allocate : 0
-                                 Override : 0
-[0002]                           Reserved : 0000
-[0001]       Memory Flags (decoded below) : 00
-                                Coherency : 0
-                         Device Attribute : 0
-[0001]                  Memory Size Limit : 00
-[0016]                        Device Name : "\_SB_.MBI4"
-[0004]                            Padding : 00 00 00 00
-
-[0004]                         Input base : 00000000
-[0004]                           ID Count : 00000001
-[0004]                        Output Base : 00040b1c
-[0004]                   Output Reference : 00000034
-[0004]              Flags (decoded below) : 00000000
-                           Single Mapping : 1
-
-/* mbi-gen dsa mbi5 - dsa2, dbg1  named component */
-[0001]                               Type : 01
-[0002]                             Length : 0046
-[0001]                           Revision : 00
-[0004]                           Reserved : 00000000
-[0004]                      Mapping Count : 00000001
-[0004]                     Mapping Offset : 00000032
-
-[0004]                         Node Flags : 00000000
-[0008]                  Memory Properties : [IORT Memory Access Properties]
-[0004]                    Cache Coherency : 00000000
-[0001]              Hints (decoded below) : 00
-                                Transient : 0
-                           Write Allocate : 0
-                            Read Allocate : 0
-                                 Override : 0
-[0002]                           Reserved : 0000
-[0001]       Memory Flags (decoded below) : 00
-                                Coherency : 0
-                         Device Attribute : 0
-[0001]                  Memory Size Limit : 00
-[0016]                        Device Name : "\_SB_.MBI5"
-[0004]                            Padding : 00 00 00 00
-
-[0004]                         Input base : 00000000
-[0004]                           ID Count : 00000001
-[0004]                        Output Base : 00040b1d
-[0004]                   Output Reference : 00000034
-[0004]              Flags (decoded below) : 00000000
-                           Single Mapping : 1
-
-/* mbi-gen dsa mbi6 - dsa sas0  named component */
-[0001]                               Type : 01
-[0002]                             Length : 0046
-[0001]                           Revision : 00
-[0004]                           Reserved : 00000000
-[0004]                      Mapping Count : 00000001
-[0004]                     Mapping Offset : 00000032
-
-[0004]                         Node Flags : 00000000
-[0008]                  Memory Properties : [IORT Memory Access Properties]
-[0004]                    Cache Coherency : 00000000
-[0001]              Hints (decoded below) : 00
-                                Transient : 0
-                           Write Allocate : 0
-                            Read Allocate : 0
-                                 Override : 0
-[0002]                           Reserved : 0000
-[0001]       Memory Flags (decoded below) : 00
-                                Coherency : 0
-                         Device Attribute : 0
-[0001]                  Memory Size Limit : 00
-[0016]                        Device Name : "\_SB_.MBI6"
-[0004]                            Padding : 00 00 00 00
-
-[0004]                         Input base : 00000000
-[0004]                           ID Count : 00000001
-[0004]                        Output Base : 00040900
-[0004]                   Output Reference : 00000034
-[0004]              Flags (decoded below) : 00000000
-                           Single Mapping : 1
-
-/* RC 0 */
-[0001]                               Type : 02
-[0002]                             Length : 0034
-[0001]                           Revision : 00
-[0004]                           Reserved : 00000000
-[0004]                      Mapping Count : 00000001
-[0004]                     Mapping Offset : 00000020
-
-[0008]                  Memory Properties : [IORT Memory Access Properties]
-[0004]                    Cache Coherency : 00000001
-[0001]              Hints (decoded below) : 00
-                                Transient : 0
-                           Write Allocate : 0
-                            Read Allocate : 0
-                                 Override : 0
-[0002]                           Reserved : 0000
-[0001]       Memory Flags (decoded below) : 00
-                                Coherency : 0
-                         Device Attribute : 0
-[0004]                      ATS Attribute : 00000000
-[0004]                 PCI Segment Number : 00000000
-
-[0004]                         Input base : 00000000
-[0004]                           ID Count : 00002000
-[0004]                        Output Base : 00000000
-[0004]                   Output Reference : 00000034
-[0004]              Flags (decoded below) : 00000000
-                           Single Mapping : 0
-
-/* RC 1 */
-[0001]                               Type : 02
-[0002]                             Length : 0034
-[0001]                           Revision : 00
-[0004]                           Reserved : 00000000
-[0004]                      Mapping Count : 00000001
-[0004]                     Mapping Offset : 00000020
-
-[0008]                  Memory Properties : [IORT Memory Access Properties]
-[0004]                    Cache Coherency : 00000001
-[0001]              Hints (decoded below) : 00
-                                Transient : 0
-                           Write Allocate : 0
-                            Read Allocate : 0
-                                 Override : 0
-[0002]                           Reserved : 0000
-[0001]       Memory Flags (decoded below) : 00
-                                Coherency : 0
-                         Device Attribute : 0
-[0004]                      ATS Attribute : 00000000
-[0004]                 PCI Segment Number : 00000001
-
-[0004]                         Input base : 0000e000
-[0004]                           ID Count : 00002000
-[0004]                        Output Base : 0000e000
-[0004]                   Output Reference : 00000034
-[0004]              Flags (decoded below) : 00000000
-                           Single Mapping : 0
-
-/* RC 2 */
-[0001]                               Type : 02
-[0002]                             Length : 0034
-[0001]                           Revision : 00
-[0004]                           Reserved : 00000000
-[0004]                      Mapping Count : 00000001
-[0004]                     Mapping Offset : 00000020
-
-[0008]                  Memory Properties : [IORT Memory Access Properties]
-[0004]                    Cache Coherency : 00000001
-[0001]              Hints (decoded below) : 00
-                                Transient : 0
-                           Write Allocate : 0
-                            Read Allocate : 0
-                                 Override : 0
-[0002]                           Reserved : 0000
-[0001]       Memory Flags (decoded below) : 00
-                                Coherency : 0
-                         Device Attribute : 0
-[0004]                      ATS Attribute : 00000000
-[0004]                 PCI Segment Number : 00000002
-
-[0004]                         Input base : 00008000
-[0004]                           ID Count : 00002000
-[0004]                        Output Base : 00008000
-[0004]                   Output Reference : 00000034
-[0004]              Flags (decoded below) : 00000000
-                           Single Mapping : 0
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc b/Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc
deleted file mode 100644
index 9f60803..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/D03Mcfg.aslc
+++ /dev/null
@@ -1,85 +0,0 @@ 
-/*
- * Copyright (c) 2016 Hisilicon Limited
- *
- * All rights reserved. This program and the accompanying materials
- * are made available under the terms of the BSD License which accompanies
- * this distribution, and is available at
- * http://opensource.org/licenses/bsd-license.php
- *
- */
-
-#include <IndustryStandard/Acpi.h>
-#include "Pv660Platform.h"
-
-#define ACPI_5_0_MCFG_VERSION  0x1
-
-#pragma pack(1)
-typedef struct
-{
-   UINT64 ullBaseAddress;
-   UINT16 usSegGroupNum;
-   UINT8  ucStartBusNum;
-   UINT8  ucEndBusNum;
-   UINT32 Reserved2;
-}EFI_ACPI_5_0_MCFG_CONFIG_STRUCTURE;
-
-typedef struct
-{
-   EFI_ACPI_DESCRIPTION_HEADER Header;
-   UINT64 Reserved1;
-}EFI_ACPI_5_0_MCFG_TABLE_CONFIG;
-
-typedef struct
-{
-   EFI_ACPI_5_0_MCFG_TABLE_CONFIG Acpi_Table_Mcfg;
-   EFI_ACPI_5_0_MCFG_CONFIG_STRUCTURE Config_Structure[3];
-}EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_TABLE;
-#pragma pack()
-
-EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_TABLE Mcfg=
-{
-  {
-      {
-        EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDRESS_DESCRIPTION_TABLE_SIGNATURE,
-        sizeof (EFI_ACPI_5_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_TABLE),
-        ACPI_5_0_MCFG_VERSION,
-        0x00,                                                     // Checksum will be updated at runtime
-        {EFI_ACPI_ARM_OEM_ID},
-        EFI_ACPI_ARM_OEM_TABLE_ID,
-        EFI_ACPI_ARM_OEM_REVISION,
-        EFI_ACPI_ARM_CREATOR_ID,
-        EFI_ACPI_ARM_CREATOR_REVISION
-      },
-      0x0000000000000000,                                 //Reserved
-  },
-  {
-
-    {
-      0xb0000000,                                         //Base Address
-      0x0,                                                //Segment Group Number
-      0x0,                                                //Start Bus Number
-      0x1f,                                               //End Bus Number
-      0x00000000,                                         //Reserved
-    },
-    {
-      0xb0000000,                                         //Base Address
-      0x1,                                                //Segment Group Number
-      0xe0,                                               //Start Bus Number
-      0xff,                                               //End Bus Number
-      0x00000000,                                         //Reserved
-    },
-    {
-      0xa0000000,                                         //Base Address
-      0x2,                                                //Segment Group Number
-      0x80,                                               //Start Bus Number
-      0x9f,                                               //End Bus Number
-      0x00000000,                                         //Reserved
-    },
-  }
-};
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Mcfg;
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl
deleted file mode 100644
index d8d453a..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Hns.asl
+++ /dev/null
@@ -1,562 +0,0 @@ 
-/** @file
-  Differentiated System Description Table Fields (DSDT)
-
-  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
-    This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-Scope(_SB)
-{
-  Device (MDIO)
-  {
-    OperationRegion(CLKR, SystemMemory, 0x60000338, 8)
-    Field(CLKR, DWordAcc, NoLock, Preserve) {
-      CLKE, 1,  // clock enable
-      , 31,
-      CLKD, 1,  // clode disable
-      , 31,
-    }
-    OperationRegion(RSTR, SystemMemory, 0x60000A38, 8)
-    Field(RSTR, DWordAcc, NoLock, Preserve) {
-      RSTE, 1,  // reset
-      , 31,
-      RSTD, 1,  // de-reset
-      , 31,
-    }
-
-    Name(_HID, "HISI0141")
-    Name (_CRS, ResourceTemplate (){
-      Memory32Fixed (ReadWrite, 0x603c0000 , 0x10000)
-            })
-
-    Method(_RST, 0, Serialized) {
-      Store (0x1, RSTE)
-      Sleep (10)
-      Store (0x1, CLKD)
-      Sleep (10)
-      Store (0x1, RSTD)
-      Sleep (10)
-      Store (0x1, CLKE)
-      Sleep (10)
-    }
-  }
-
-  Device (DSF0)
-  {
-    OperationRegion(H3SR, SystemMemory, 0xC0000184, 4)
-    Field(H3SR, DWordAcc, NoLock, Preserve) {
-          H3ST, 1,
-          , 31,  //RESERVED
-        }
-    OperationRegion(H4SR, SystemMemory, 0xC0000194, 4)
-    Field(H4SR, DWordAcc, NoLock, Preserve) {
-          H4ST, 1,
-          , 31,  //RESERVED
-        }
-    // DSAF RESET
-    OperationRegion(DRER, SystemMemory, 0xC0000A00, 8)
-    Field(DRER, DWordAcc, NoLock, Preserve) {
-          DRTE, 1,
-          , 31,  //RESERVED
-          DRTD, 1,
-          , 31,  //RESERVED
-        }
-    // NT RESET
-    OperationRegion(NRER, SystemMemory, 0xC0000A08, 8)
-    Field(NRER, DWordAcc, NoLock, Preserve) {
-          NRTE, 1,
-          , 31,  //RESERVED
-          NRTD, 1,
-          , 31,  //RESERVED
-        }
-    // XGE RESET
-    OperationRegion(XRER, SystemMemory, 0xC0000A10, 8)
-    Field(XRER, DWordAcc, NoLock, Preserve) {
-          XRTE, 31,
-          , 1,    //RESERVED
-          XRTD, 31,
-          , 1,    //RESERVED
-        }
-
-    // GE RESET
-    OperationRegion(GRTR, SystemMemory, 0xC0000A18, 16)
-    Field(GRTR, DWordAcc, NoLock, Preserve) {
-          GR0E, 30,
-          , 2,    //RESERVED
-          GR0D, 30,
-          , 2,    //RESERVED
-          GR1E, 18,
-          , 14,  //RESERVED
-          GR1D, 18,
-          , 14,  //RESERVED
-        }
-    // PPE RESET
-    OperationRegion(PRTR, SystemMemory, 0xC0000A48, 8)
-    Field(PRTR, DWordAcc, NoLock, Preserve) {
-          PRTE, 10,
-          , 22,  //RESERVED
-          PRTD, 10,
-          , 22,  //RESERVED
-        }
-
-    // RCB PPE COM RESET
-    OperationRegion(RRTR, SystemMemory, 0xC0000A88, 8)
-    Field(RRTR, DWordAcc, NoLock, Preserve) {
-          RRTE, 1,
-          , 31,  //RESERVED
-          RRTD, 1,
-          , 31,  //RESERVED
-        }
-
-    // Hilink access sel cfg reg
-    OperationRegion(HSER, SystemMemory, 0xC2240008, 0x4)
-    Field(HSER, DWordAcc, NoLock, Preserve) {
-          HSEL, 2,  // hilink_access_sel & hilink_access_wr_pul
-          , 30,    // RESERVED
-        }
-
-    // Serdes
-    OperationRegion(H4LR, SystemMemory, 0xC2208100, 0x1000)
-    Field(H4LR, DWordAcc, NoLock, Preserve) {
-          H4L0, 16,    // port0
-          , 16,    //RESERVED
-          Offset (0x400),
-          H4L1, 16,    // port1
-          , 16,    //RESERVED
-          Offset (0x800),
-          H4L2, 16,    // port2
-          , 16,    //RESERVED
-          Offset (0xc00),
-          H4L3, 16,    // port3
-          , 16,    //RESERVED
-        }
-    OperationRegion(H3LR, SystemMemory, 0xC2208900, 0x800)
-    Field(H3LR, DWordAcc, NoLock, Preserve) {
-          H3L2, 16,    // port4
-          , 16,    //RESERVED
-          Offset (0x400),
-          H3L3, 16,    // port5
-          , 16,    //RESERVED
-        }
-                Name (_HID, "HISI00B2")
-                Name (_CCA, 1) // Cache-coherent controller
-                Name (_CRS, ResourceTemplate (){
-                        Memory32Fixed (ReadWrite, 0xc5000000 , 0x890000)
-                        Memory32Fixed (ReadWrite, 0xc7000000 , 0x60000)
-      Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive,,,)
-        {
-          576, 577, 578, 579, 580, 581, 582, 583, 584, 585, 586, 587, 588,
-          589, 590, 591, 592, 593, 594, 595, 596, 597, 598, 599, 600,
-        }
-      Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive,,,)
-        {
-          960, 961, 962, 963, 964, 965, 966, 967, 968, 969, 970, 971, 972, 973, 974, 975,
-          976, 977, 978, 979, 980, 981, 982, 983, 984, 985, 986, 987, 988, 989, 990, 991,
-          992, 993, 994, 995, 996, 997, 998, 999, 1000, 1001, 1002, 1003, 1004, 1005, 1006, 1007,
-          1008, 1009, 1010, 1011, 1012, 1013, 1014, 1015, 1016, 1017, 1018, 1019, 1020, 1021, 1022, 1023,
-          1024, 1025, 1026, 1027, 1028, 1029, 1030, 1031, 1032, 1033, 1034, 1035, 1036, 1037, 1038, 1039,
-          1040, 1041, 1042, 1043, 1044, 1045, 1046, 1047, 1048, 1049, 1050, 1051, 1052, 1053, 1054, 1055,
-          1056, 1057, 1058, 1059, 1060, 1061, 1062, 1063, 1064, 1065, 1066, 1067, 1068, 1069, 1070, 1071,
-          1072, 1073, 1074, 1075, 1076, 1077, 1078, 1079, 1080, 1081, 1082, 1083, 1084, 1085, 1086, 1087,
-          1088, 1089, 1090, 1091, 1092, 1093, 1094, 1095, 1096, 1097, 1098, 1099, 1100, 1101, 1102, 1103,
-          1104, 1105, 1106, 1107, 1108, 1109, 1110, 1111, 1112, 1113, 1114, 1115, 1116, 1117, 1118, 1119,
-          1120, 1121, 1122, 1123, 1124, 1125, 1126, 1127, 1128, 1129, 1130, 1131, 1132, 1133, 1134, 1135,
-          1136, 1137, 1138, 1139, 1140, 1141, 1142, 1143, 1144, 1145, 1146, 1147, 1148, 1149, 1150, 1151,
-        }
-      Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive,,,)
-        {
-          1152, 1153, 1154, 1155, 1156, 1157, 1158, 1159, 1160, 1161, 1162, 1163, 1164, 1165, 1166, 1167,
-          1168, 1169, 1170, 1171, 1172, 1173, 1174, 1175, 1176, 1177, 1178, 1179, 1180, 1181, 1182, 1183,
-          1184, 1185, 1186, 1187, 1188, 1189, 1190, 1191, 1192, 1193, 1194, 1195, 1196, 1197, 1198, 1199,
-          1200, 1201, 1202, 1203, 1204, 1205, 1206, 1207, 1208, 1209, 1210, 1211, 1212, 1213, 1214, 1215,
-          1216, 1217, 1218, 1219, 1220, 1221, 1222, 1223, 1224, 1225, 1226, 1227, 1228, 1229, 1230, 1231,
-          1232, 1233, 1234, 1235, 1236, 1237, 1238, 1239, 1240, 1241, 1242, 1243, 1244, 1245, 1246, 1247,
-          1248, 1249, 1250, 1251, 1252, 1253, 1254, 1255, 1256, 1257, 1258, 1259, 1260, 1261, 1262, 1263,
-          1264, 1265, 1266, 1267, 1268, 1269, 1270, 1271, 1272, 1273, 1274, 1275, 1276, 1277, 1278, 1279,
-          1280, 1281, 1282, 1283, 1284, 1285, 1286, 1287, 1288, 1289, 1290, 1291, 1292, 1293, 1294, 1295,
-          1296, 1297, 1298, 1299, 1300, 1301, 1302, 1303, 1304, 1305, 1306, 1307, 1308, 1309, 1310, 1311,
-          1312, 1313, 1314, 1315, 1316, 1317, 1318, 1319, 1320, 1321, 1322, 1323, 1324, 1325, 1326, 1327,
-          1328, 1329, 1330, 1331, 1332, 1333, 1334, 1335, 1336, 1337, 1338, 1339, 1340, 1341, 1342, 1343,
-        }
-                })
-                Name (_DSD, Package () {
-                        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-      Package () {
-        Package () {"mode", "6port-16rss"},
-        Package () {"buf-size", 4096},
-        Package () {"desc-num", 1024},
-        Package () {"interrupt-parent", Package() {\_SB.MBI3}},
-                        }
-                })
-
-    //reset XGE port
-    //Arg0 : XGE port index in dsaf
-    //Arg1 : 0 reset, 1 cancle reset
-    Method(XRST, 2, Serialized) {
-      ShiftLeft (0x2082082, Arg0, Local0)
-      Or (Local0, 0x1, Local0)
-
-      If (LEqual (Arg1, 0)) {
-        Store(Local0, XRTE)
-      } Else  {
-        Store(Local0, XRTD)
-      }
-    }
-
-    //reset XGE core
-    //Arg0 : XGE port index in dsaf
-    //Arg1 : 0 reset, 1 cancle reset
-    Method(XCRT, 2, Serialized) {
-      ShiftLeft (0x2080, Arg0, Local0)
-
-      If (LEqual (Arg1, 0)) {
-        Store(Local0, XRTE)
-      } Else  {
-        Store(Local0, XRTD)
-      }
-    }
-
-    //reset GE port
-    //Arg0 : GE port index in dsaf
-    //Arg1 : 0 reset, 1 cancle reset
-    Method(GRST, 2, Serialized) {
-      If (LLessEqual (Arg0, 5)) {
-        //Service port
-        ShiftLeft (0x2082082, Arg0, Local0)
-        ShiftLeft (0x1, Arg0, Local1)
-
-        If (LEqual (Arg1, 0)) {
-          Store(Local1, GR1E)
-          Store(Local0, GR0E)
-        } Else  {
-          Store(Local0, GR0D)
-          Store(Local1, GR1D)
-        }
-      }
-    }
-
-    //reset PPE port
-    //Arg0 : PPE port index in dsaf
-    //Arg1 : 0 reset, 1 cancle reset
-    Method(PRST, 2, Serialized) {
-      ShiftLeft (0x1, Arg0, Local0)
-      If (LEqual (Arg1, 0)) {
-        Store(Local0, PRTE)
-      } Else  {
-        Store(Local0, PRTD)
-      }
-    }
-
-    // Set Serdes Loopback
-    //Arg0 : port
-    //Arg1 : 0 disable, 1 enable
-    Method(SRLP, 2, Serialized) {
-      ShiftLeft (Arg1, 10, Local0)
-      Switch (ToInteger(Arg0))
-      {
-        case (0x0){
-          Store (0, HSEL)
-          Store (H4L0, Local1)
-          And (Local1, 0xfffffbff, Local1)
-          Or (Local0, Local1, Local0)
-          Store (Local0, H4L0)
-        }
-        case (0x1){
-          Store (0, HSEL)
-          Store (H4L1, Local1)
-          And (Local1, 0xfffffbff, Local1)
-          Or (Local0, Local1, Local0)
-          Store (Local0, H4L1)
-        }
-        case (0x2){
-          Store (0, HSEL)
-          Store (H4L2, Local1)
-          And (Local1, 0xfffffbff, Local1)
-          Or (Local0, Local1, Local0)
-          Store (Local0, H4L2)
-        }
-        case (0x3){
-          Store (0, HSEL)
-          Store (H4L3, Local1)
-          And (Local1, 0xfffffbff, Local1)
-          Or (Local0, Local1, Local0)
-          Store (Local0, H4L3)
-        }
-        case (0x4){
-          Store (3, HSEL)
-          Store (H3L2, Local1)
-          And (Local1, 0xfffffbff, Local1)
-          Or (Local0, Local1, Local0)
-          Store (Local0, H3L2)
-        }
-        case (0x5){
-          Store (3, HSEL)
-          Store (H3L3, Local1)
-          And (Local1, 0xfffffbff, Local1)
-          Or (Local0, Local1, Local0)
-          Store (Local0, H3L3)
-        }
-      }
-    }
-
-    //Reset
-    //Arg0 : reset type (1: dsaf; 2: ppe; 3:XGE core; 4:XGE; 5:G3)
-    //Arg1 : port
-    //Arg2 : 0 disable, 1 enable
-    Method(DRST, 3, Serialized)
-    {
-      Switch (ToInteger(Arg0))
-      {
-        //DSAF reset
-        case (0x1)
-        {
-          Store (Arg2, Local0)
-          If (LEqual (Local0, 0))
-          {
-            Store (0x1, DRTE)
-            Store (0x1, NRTE)
-            Sleep (10)
-            Store (0x1, RRTE)
-          }
-          Else
-          {
-            Store (0x1, DRTD)
-            Store (0x1, NRTD)
-            Sleep (10)
-            Store (0x1, RRTD)
-          }
-        }
-        //Reset PPE port
-        case (0x2)
-        {
-          Store (Arg1, Local0)
-          Store (Arg2, Local1)
-          PRST (Local0, Local1)
-        }
-
-        //Reset XGE core
-        case (0x3)
-        {
-          Store (Arg1, Local0)
-          Store (Arg2, Local1)
-          XCRT (Local0, Local1)
-        }
-        //Reset XGE port
-        case (0x4)
-        {
-          Store (Arg1, Local0)
-          Store (Arg2, Local1)
-          XRST (Local0, Local1)
-        }
-
-        //Reset GE port
-        case (0x5)
-        {
-          Store (Arg1, Local0)
-          Store (Arg2, Local1)
-          GRST (Local0, Local1)
-        }
-      }
-    }
-
-    // _DSM Device Specific Method
-    //
-    // Arg0: UUID Unique function identifier
-    // Arg1: Integer Revision Level
-    // Arg2: Integer Function Index
-    //   0 : Return Supported Functions bit mask
-    //   1 : Reset Sequence
-    //    Arg3[0] : reset type (1:dsaf; 2:ppe; 3:xge core; 4:xge; 5: ge)
-    //    Arg3[1] : port index in dsaf
-    //    Arg3[2] : 0 reset, 1 cancle reset
-    //   2 : Set Serdes Loopback
-    //    Arg3[0] : port
-    //    Arg3[1] : 0 disable, 1 enable
-    //   3 : LED op set
-    //    Arg3[0] : op type
-    //    Arg3[1] : port
-    //    Arg3[2] : para
-    //   4 : Get port type (GE or XGE)
-    //    Arg3[0] : port index in dsaf
-    //    Return : 0 GE, 1 XGE
-    //   5 : Get sfp status
-    //    Arg3[0] : port index in dsaf
-    //    Return : 0 no sfp, 1 have sfp
-    // Arg3: Package Parameters
-    Method (_DSM, 4, Serialized)
-    {
-      If (LEqual(Arg0,ToUUID("1A85AA1A-E293-415E-8E28-8D690A0F820A")))
-      {
-        If (LEqual (Arg1, 0x00))
-        {
-          Switch (ToInteger(Arg2))
-          {
-            case (0x0)
-            {
-              Return (Buffer () {0x3F})
-            }
-
-            //Reset Sequence
-            case (0x1)
-            {
-              Store (DeRefOf (Index (Arg3, 0)), Local0)
-              Store (DeRefOf (Index (Arg3, 1)), Local1)
-              Store (DeRefOf (Index (Arg3, 2)), Local2)
-              DRST (Local0, Local1, Local2)
-            }
-
-            //Set Serdes Loopback
-            case (0x2)
-            {
-              Store (DeRefOf (Index (Arg3, 0)), Local0)
-              Store (DeRefOf (Index (Arg3, 1)), Local1)
-              SRLP (Local0, Local1)
-            }
-
-            //LED op set
-            case (0x3)
-            {
-
-            }
-
-            // Get port type (GE or XGE)
-            case (0x4)
-            {
-              Store (0, Local1)
-              Store (DeRefOf (Index (Arg3, 0)), Local0)
-              If (LLessEqual (Local0, 3))
-              {
-                // mac0: Hilink4 Lane0
-                // mac1: Hilink4 Lane1
-                // mac2: Hilink4 Lane2
-                // mac3: Hilink4 Lane3
-                Store (H4ST, Local1)
-              }
-              ElseIf (LLessEqual (Local0, 5))
-              {
-                // mac4: Hilink3 Lane2
-                // mac5: Hilink3 Lane3
-                Store (H3ST, Local1)
-              }
-
-              Return (Local1)
-            }
-
-            //Get sfp status
-            case (0x5)
-            {
-
-            }
-          }
-        }
-      }
-      Return (Buffer() {0x00})
-    }
-    Device (PRT0)
-    {
-      Name (_ADR, 0x0)
-      Name (_DSD, Package () {
-                        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-            Package () {
-                Package () {"reg", 0},
-                Package () {"media-type", "fiber"},
-                        }
-                })
-    }
-    Device (PRT1)
-    {
-      Name (_ADR, 0x1)
-      Name (_DSD, Package () {
-                        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-            Package () {
-                Package () {"reg", 1},
-                Package () {"media-type", "fiber"},
-                        }
-                })
-    }
-    Device (PRT4)
-    {
-      Name (_ADR, 0x4)
-      Name (_DSD, Package () {
-                        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-            Package () {
-                Package () {"reg", 4},
-                                Package () {"phy-mode", "sgmii"},
-                Package () {"phy-addr", 0},
-                Package () {"mdio-node", Package (){\_SB.MDIO}},
-                Package () {"media-type", "copper"},
-                        }
-                })
-    }
-    Device (PRT5)
-    {
-      Name (_ADR, 0x5)
-      Name (_DSD, Package () {
-                        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-            Package () {
-                Package () {"reg", 5},
-                                Package () {"phy-mode", "sgmii"},
-                Package () {"phy-addr", 1},
-                Package () {"mdio-node", Package (){\_SB.MDIO}},
-                Package () {"media-type", "copper"},
-                        }
-                })
-    }
-  }
-  Device (ETH4) {
-    Name(_HID, "HISI00C2")
-    Name (_CCA, 1) // Cache-coherent controller
-    Name (_DSD, Package () {
-      ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-      Package () {
-        Package () {"local-mac-address", Package () { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }}, // 6-bytes
-        Package () {"ae-handle", Package (){\_SB.DSF0}},
-        Package () {"port-idx-in-ae", 4},
-      }
-    })
-  }
-  Device (ETH5) {
-    Name(_HID, "HISI00C2")
-    Name (_CCA, 1) // Cache-coherent controller
-    Name (_DSD, Package () {
-      ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-      Package () {
-        Package () {"local-mac-address", Package () { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }}, // 6-bytes
-        Package () {"ae-handle", Package (){\_SB.DSF0}},
-        Package () {"port-idx-in-ae", 5},
-      }
-    })
-  }
-  Device (ETH0) {
-    Name(_HID, "HISI00C2")
-    Name (_CCA, 1) // Cache-coherent controller
-    Name (_DSD, Package () {
-      ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-      Package () {
-        Package () {"local-mac-address", Package () { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }}, // 6-bytes
-        Package () {"ae-handle", Package (){\_SB.DSF0}},
-        Package () {"port-idx-in-ae", 0},
-      }
-    })
-  }
-  Device (ETH1) {
-    Name(_HID, "HISI00C2")
-    Name (_CCA, 1) // Cache-coherent controller
-    Name (_DSD, Package () {
-      ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-      Package () {
-        Package () {"local-mac-address", Package () { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF }}, // 6-bytes
-        Package () {"ae-handle", Package (){\_SB.DSF0}},
-        Package () {"port-idx-in-ae", 1},
-      }
-    })
-  }
-
-}
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl
deleted file mode 100644
index 4eaa073..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Mbig.asl
+++ /dev/null
@@ -1,125 +0,0 @@ 
-/** @file
-  Differentiated System Description Table Fields (DSDT)
-
-  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
-    This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-Scope(_SB)
-{
-  // Mbi-gen pcie subsys
-  Device(MBI0) {
-    Name(_HID, "HISI0152")
-    Name(_CID, "MBIGen")
-    Name(_CRS, ResourceTemplate() {
-      Memory32Fixed(ReadWrite, 0xa0080000, 0x10000)
-    })
-
-   Name(_DSD, Package () {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package ()
-        {
-          Package () {"num-pins", 2}
-        }
-   })
-  }
-
-  // Mbi-gen sas1 intc
-  Device(MBI1) {
-    Name(_HID, "HISI0152")
-    Name(_CID, "MBIGen")
-    Name(_CRS, ResourceTemplate() {
-      Memory32Fixed(ReadWrite, 0xa0080000, 0x10000)
-    })
-   Name(_DSD, Package () {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package ()
-        {
-          Package () {"num-pins", 128}
-        }
-   })
-  }
-
-  Device(MBI2) {          // Mbi-gen sas2 intc
-    Name(_HID, "HISI0152")
-    Name(_CID, "MBIGen")
-    Name(_CRS, ResourceTemplate() {
-      Memory32Fixed(ReadWrite, 0xa0080000, 0x10000)
-    })
-   Name(_DSD, Package () {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package ()
-        {
-          Package () {"num-pins", 128}
-        }
-   })
-  }
-
-  Device(MBI3) {          // Mbi-gen dsa0 srv intc
-    Name(_HID, "HISI0152")
-    Name(_CID, "MBIGen")
-    Name(_CRS, ResourceTemplate() {
-      Memory32Fixed(ReadWrite, 0xc0080000, 0x10000)
-    })
-   Name(_DSD, Package () {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package ()
-        {
-          Package () {"num-pins", 409}
-        }
-   })
-  }
-
-  Device(MBI4) {          // Mbi-gen dsa1 dbg0 intc
-    Name(_HID, "HISI0152")
-    Name(_CID, "MBIGen")
-    Name(_CRS, ResourceTemplate() {
-      Memory32Fixed(ReadWrite, 0xc0080000, 0x10000)
-    })
-   Name(_DSD, Package () {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package ()
-        {
-          Package () {"num-pins", 9}
-        }
-   })
-  }
-
-  Device(MBI5) {          // Mbi-gen dsa2 dbg1 intc
-    Name(_HID, "HISI0152")
-    Name(_CID, "MBIGen")
-    Name(_CRS, ResourceTemplate() {
-      Memory32Fixed(ReadWrite, 0xc0080000, 0x10000)
-    })
-   Name(_DSD, Package () {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package ()
-        {
-          Package () {"num-pins", 9}
-        }
-   })
-  }
-
-  Device(MBI6) {          // Mbi-gen dsa sas0 intc
-    Name(_HID, "HISI0152")
-    Name(_CID, "MBIGen")
-    Name(_CRS, ResourceTemplate() {
-      Memory32Fixed(ReadWrite, 0xc0080000, 0x10000)
-    })
-   Name(_DSD, Package () {
-        ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-        Package ()
-        {
-          Package () {"num-pins", 128}
-        }
-   })
-  }
-
-}
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl
deleted file mode 100644
index 573c0a3..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Pci.asl
+++ /dev/null
@@ -1,261 +0,0 @@ 
-/** @file
-*
-*  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
-*  Copyright (c) 2016, Hisilicon Limited. All rights reserved.
-*  Copyright (c) 2016, Linaro Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-*  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
-*
-**/
-
-//#include "ArmPlatform.h"
-Scope(_SB)
-{
-  // PCIe Root bus
-  Device (PCI0)
-  {
-    Name (_HID, "HISI0080") // PCI Express Root Bridge
-    Name (_CID, "PNP0A03") // Compatible PCI Root Bridge
-    Name(_SEG, 0) // Segment of this Root complex
-    Name(_BBN, 0) // Base Bus Number
-    Name(_CCA, 1)
-    Method (_CRS, 0, Serialized) { // Root complex resources
-      Name (RBUF, ResourceTemplate () {
-        WordBusNumber ( // Bus numbers assigned to this root
-          ResourceProducer, MinFixed, MaxFixed, PosDecode,
-          0, // AddressGranularity
-          0x0, // AddressMinimum - Minimum Bus Number
-          0x1f, // AddressMaximum - Maximum Bus Number
-          0, // AddressTranslation - Set to 0
-          0x20 // RangeLength - Number of Busses
-        )
-        QWordMemory ( // 64-bit BAR Windows
-          ResourceProducer,
-          PosDecode,
-          MinFixed,
-          MaxFixed,
-          Cacheable,
-          ReadWrite,
-          0x0, // Granularity
-          0xb2000000, // Min Base Address pci address
-          0xb7feffff, // Max Base Address
-          0x0, // Translate
-          0x5ff0000 // Length
-        )
-        QWordIO (
-          ResourceProducer,
-          MinFixed,
-          MaxFixed,
-          PosDecode,
-          EntireRange,
-          0x0, // Granularity
-          0x0, // Min Base Address
-          0xffff, // Max Base Address
-          0xb7ff0000, // Translate
-          0x10000 // Length
-        )
-      }) // Name(RBUF)
-      Return (RBUF)
-    } // Method(_CRS)
-
-    Device (RES0)
-    {
-      Name (_HID, "HISI0081") // HiSi PCIe RC config base address
-      Name (_CRS, ResourceTemplate (){
-        Memory32Fixed (ReadWrite, 0xa0090000 , 0x10000)
-      })
-    }
-
-    OperationRegion(SCTR, SystemMemory, 0xa009131c, 4)
-    Field(SCTR, AnyAcc, NoLock, Preserve) {
-      LSTA, 32,
-    }
-    Method(_DSM, 0x4, Serialized) {
-      If(LEqual(Arg0,ToUUID("6d30f553-836c-408e-b6ad-45bccc957949"))) {
-        switch(ToInteger(Arg2))
-        {
-          // Function 0: Return LinkStatus
-          case(0) {
-              Store (0, Local0)
-              Store (LSTA, Local0)
-              Return (Local0)
-          }
-          default {
-          }
-        }
-      }
-      // If not one of the function identifiers we recognize, then return a buffer
-      // with bit 0 set to 0 indicating no functions supported.
-      return(Buffer(){0})
-    }
-  } // Device(PCI0)
-
-  // PCIe Root bus
-  Device (PCI1)
-  {
-    Name (_HID, "HISI0080") // PCI Express Root Bridge
-    Name (_CID, "PNP0A03") // Compatible PCI Root Bridge
-    Name(_SEG, 1) // Segment of this Root complex
-    Name(_BBN, 0xe0) // Base Bus Number
-    Name(_CCA, 1)
-    Method (_CRS, 0, Serialized) { // Root complex resources
-      Name (RBUF, ResourceTemplate () {
-        WordBusNumber ( // Bus numbers assigned to this root
-          ResourceProducer, MinFixed, MaxFixed, PosDecode,
-          0, // AddressGranularity
-          0xe0, // AddressMinimum - Minimum Bus Number
-          0xff, // AddressMaximum - Maximum Bus Number
-          0,   // AddressTranslation - Set to 0
-          0x20 // RangeLength - Number of Busses
-        )
-        QWordMemory ( // 64-bit BAR Windows
-          ResourceProducer,
-          PosDecode,
-          MinFixed,
-          MaxFixed,
-          Cacheable,
-          ReadWrite,
-          0x0, // Granularity
-          0xb8000000, // Min Base Address pci address
-          0xbdfeffff, // Max Base Address
-          0x0, // Translate
-          0x5ff0000 // Length
-        )
-        QWordIO (
-          ResourceProducer,
-          MinFixed,
-          MaxFixed,
-          PosDecode,
-          EntireRange,
-          0x0, // Granularity
-          0x0, // Min Base Address
-          0xffff, // Max Base Address
-          0xbdff0000, // Translate
-          0x10000 // Length
-        )
-      }) // Name(RBUF)
-      Return (RBUF)
-    } // Method(_CRS)
-
-    Device (RES1)
-    {
-      Name (_HID, "HISI0081") // HiSi PCIe RC config base address
-      Name (_CRS, ResourceTemplate (){
-        Memory32Fixed (ReadWrite, 0xa0200000 , 0x10000)
-      })
-    }
-
-    OperationRegion(SCTR, SystemMemory, 0xa020131c, 4)
-    Field(SCTR, AnyAcc, NoLock, Preserve) {
-      LSTA, 32,
-    }
-    Method(_DSM, 0x4, Serialized) {
-      If(LEqual(Arg0,ToUUID("6d30f553-836c-408e-b6ad-45bccc957949"))) {
-
-        switch(ToInteger(Arg2))
-        {
-          // Function 0: Return LinkStatus
-          case(0) {
-              Store (0, Local0)
-              Store (LSTA, Local0)
-              Return (Local0)
-          }
-          default {
-          }
-        }
-      }
-      // If not one of the function identifiers we recognize, then return a buffer
-      // with bit 0 set to 0 indicating no functions supported.
-      return(Buffer(){0})
-    }
-  } // Device(PCI1)
-
-  // PCIe Root bus
-  Device (PCI2)
-  {
-    Name (_HID, "HISI0080") // PCI Express Root Bridge
-    Name (_CID, "PNP0A03") // Compatible PCI Root Bridge
-    Name(_SEG, 2) // Segment of this Root complex
-    Name(_BBN, 0x80) // Base Bus Number
-    Name(_CCA, 1)
-    Method (_CRS, 0, Serialized) { // Root complex resources
-      Name (RBUF, ResourceTemplate () {
-        WordBusNumber ( // Bus numbers assigned to this root
-          ResourceProducer, MinFixed, MaxFixed, PosDecode,
-          0, // AddressGranularity
-          0x80, // AddressMinimum - Minimum Bus Number
-          0x9f, // AddressMaximum - Maximum Bus Number
-          0, // AddressTranslation - Set to 0
-          0x20 // RangeLength - Number of Busses
-        )
-        QWordMemory ( // 64-bit BAR Windows
-          ResourceProducer,
-          PosDecode,
-          MinFixed,
-          MaxFixed,
-          Cacheable,
-          ReadWrite,
-          0x0, // Granularity
-          0xaa000000, // Min Base Address
-          0xaffeffff, // Max Base Address
-          0x0, // Translate
-          0x5ff0000 // Length
-        )
-        QWordIO (
-          ResourceProducer,
-          MinFixed,
-          MaxFixed,
-          PosDecode,
-          EntireRange,
-          0x0, // Granularity
-          0x0, // Min Base Address
-          0xffff, // Max Base Address
-          0xafff0000, // Translate
-          0x10000 // Length
-        )
-      }) // Name(RBUF)
-      Return (RBUF)
-    } // Method(_CRS)
-
-    Device (RES2)
-    {
-      Name (_HID, "HISI0081") // HiSi PCIe RC config base address
-      Name (_CRS, ResourceTemplate (){
-        Memory32Fixed (ReadWrite, 0xa00a0000, 0x10000)
-      })
-    }
-
-    OperationRegion(SCTR, SystemMemory, 0xa00a131c, 4)
-    Field(SCTR, AnyAcc, NoLock, Preserve) {
-      LSTA, 32,
-    }
-    Method(_DSM, 0x4, Serialized) {
-      If(LEqual(Arg0,ToUUID("6d30f553-836c-408e-b6ad-45bccc957949")))
-      {
-        switch(ToInteger(Arg2))
-        {
-          // Function 0: Return LinkStatus
-          case(0) {
-              Store (0, Local0)
-              Store (LSTA, Local0)
-              Return (Local0)
-          }
-          default {
-          }
-        }
-      }
-      // If not one of the function identifiers we recognize, then return a buffer
-      // with bit 0 set to 0 indicating no functions supported.
-      return(Buffer(){0})
-    }
-  } // Device(PCI2)
-}
-
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl
deleted file mode 100644
index ce8ccd6..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Sas.asl
+++ /dev/null
@@ -1,247 +0,0 @@ 
-/** @file
-  Differentiated System Description Table Fields (DSDT)
-
-  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
-  Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
-  Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
-    This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-Scope(_SB)
-{
-    Device(SAS0) {
-          Name(_HID, "HISI0162")
-    Name(_CCA, 1)
-          Name(_CRS, ResourceTemplate() {
-                  Memory32Fixed(ReadWrite, 0xC3000000, 0x10000)
-                  Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
-                  {
-      64,65,66,67,68,
-      69,70,71,72,73,
-      75,76,77,78,79,
-      80,81,82,83,84,
-      85,86,87,88,89,
-      90,91,92,93,94,
-      95,96,97,98,99,
-      100,101,102,103,104,
-      105,106,107,108,109,
-      110,111,112,113,114,
-      115,116,117,118,119,
-      120,121,122,123,124,
-      125,126,127,128,129,
-      130,131,132,133,134,
-      135,136,137,138,139,
-      140,141,142,143,144,
-      145,146,147,148,149,
-      150,151,152,153,154,
-      155,156,157,158,159,
-      160,
-      }
-
-                  Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
-                  {
-      601,602,603,604,
-      605,606,607,608,609,
-      610,611,612,613,614,
-      615,616,617,618,619,
-      620,621,622,623,624,
-      625,626,627,628,629,
-      630,631,632,
-      }
-          })
-
-          Name (_DSD, Package () {
-              ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-              Package () {
-                  Package () {"interrupt-parent",Package() {\_SB.MBI6}},
-      Package (2) {"sas-addr", Package() {50, 01, 88, 20, 16, 00, 00, 0x00}},
-      Package () {"queue-count", 16},
-      Package () {"phy-count", 8},
-              }
-          })
-
-    OperationRegion (CTL, SystemMemory, 0xC0000000, 0x10000)
-    Field (CTL, AnyAcc, NoLock, Preserve)
-    {
-      Offset (0x338),
-      CLK, 32,
-      CLKD, 32,
-      Offset (0xa60),
-      RST, 32,
-      DRST, 32,
-      Offset (0x5a30),
-      STS, 32,
-    }
-
-    Method (_RST, 0x0, Serialized)
-    {
-      Store(0x7ffff, RST)
-      Store(0x7ffff, CLKD)
-      Sleep(1)
-      Store(0x7ffff, DRST)
-      Store(0x7ffff, CLK)
-      Sleep(1)
-    }
-    }
-
-    Device(SAS1) {
-          Name(_HID, "HISI0162")
-    Name(_CCA, 1)
-          Name(_CRS, ResourceTemplate() {
-                  Memory32Fixed(ReadWrite, 0xA2000000, 0x10000)
-
-      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
-                  {
-      64,65,66,67,68,
-      69,70,71,72,73,
-      75,76,77,78,79,
-      80,81,82,83,84,
-      85,86,87,88,89,
-      90,91,92,93,94,
-      95,96,97,98,99,
-      100,101,102,103,104,
-      105,106,107,108,109,
-      110,111,112,113,114,
-      115,116,117,118,119,
-      120,121,122,123,124,
-      125,126,127,128,129,
-      130,131,132,133,134,
-      135,136,137,138,139,
-      140,141,142,143,144,
-      145,146,147,148,149,
-      150,151,152,153,154,
-      155,156,157,158,159,
-      160,
-      }
-
-                  Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
-                  {
-         576,577,578,579,580,
-      581,582,583,584,585,
-      586,587,588,589,590,
-      591,592,593,594,595,
-      596,597,598,599,600,
-      601,602,603,604,605,
-      606,607,
-      }
-          })
-
-          Name (_DSD, Package () {
-              ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-              Package () {
-                  Package () {"interrupt-parent",Package() {\_SB.MBI1}},
-                  Package (2) {"sas-addr", Package() {50, 01, 88, 20, 16, 00, 00, 00}},
-                  Package () {"queue-count", 16},
-                  Package () {"phy-count", 8},
-                  Package () {"hip06-sas-v2-quirk-amt", 1},
-              }
-          })
-
-    OperationRegion (CTL, SystemMemory, 0xA0000000, 0x10000)
-    Field (CTL, AnyAcc, NoLock, Preserve)
-    {
-      Offset (0x318),
-      CLK, 32,
-      CLKD, 32,
-      Offset (0xa18),
-      RST, 32,
-      DRST, 32,
-      Offset (0x5a0c),
-      STS, 32,
-    }
-
-    Method (_RST, 0x0, Serialized)
-    {
-      Store(0x7ffff, RST)
-      Store(0x7ffff, CLKD)
-      Sleep(1)
-      Store(0x7ffff, DRST)
-      Store(0x7ffff, CLK)
-      Sleep(1)
-    }
-    }
-
-    Device(SAS2) {
-          Name(_HID, "HISI0162")
-    Name(_CCA, 1)
-          Name(_CRS, ResourceTemplate() {
-                  Memory32Fixed(ReadWrite, 0xA3000000, 0x10000)
-
-      Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
-                  {
-      192,193,194,195,196,
-      197,198,199,200,201,
-      202,203,204,205,206,
-      207,208,209,210,211,
-      212,213,214,215,216,
-      217,218,219,220,221,
-      222,223,224,225,226,
-      227,228,229,230,231,
-      232,233,234,235,236,
-      237,238,239,240,241,
-      242,243,244,245,246,
-      247,248,249,250,251,
-      252,253,254,255,256,
-      257,258,259,260,261,
-      262,263,264,265,266,
-      267,268,269,270,271,
-      272,273,274,275,276,
-      277,278,279,280,281,
-      282,283,284,285,286,
-      287,
-      }
-
-                  Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
-                  {
-      608,609,610,611,
-      612,613,614,615,616,
-      617,618,619,620,621,
-      622,623,624,625,626,
-      627,628,629,630,631,
-      632,633,634,635,636,
-      637,638,639,
-      }
-          })
-
-          Name (_DSD, Package () {
-              ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-              Package () {
-                  Package () {"interrupt-parent",Package() {\_SB.MBI2}},
-      Package (2) {"sas-addr", Package() {50, 01, 88, 20, 16, 00, 00, 00}},
-      Package () {"queue-count", 16},
-      Package () {"phy-count", 8},
-              }
-          })
-
-    OperationRegion (CTL, SystemMemory, 0xA0000000, 0x10000)
-    Field (CTL, AnyAcc, NoLock, Preserve)
-    {
-      Offset (0x3a8),
-      CLK, 32,
-      CLKD, 32,
-      Offset (0xae0),
-      RST, 32,
-      DRST, 32,
-      Offset (0x5a70),
-      STS, 32,
-    }
-
-    Method (_RST, 0x0, Serialized)
-    {
-      Store(0x7ffff, RST)
-      Store(0x7ffff, CLKD)
-      Sleep(1)
-      Store(0x7ffff, DRST)
-      Store(0x7ffff, CLK)
-      Sleep(1)
-    }
-    }
-
-}
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl
deleted file mode 100644
index 28ba03d..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/D03Usb.asl
+++ /dev/null
@@ -1,136 +0,0 @@ 
-/** @file
-  Differentiated System Description Table Fields (DSDT)
-
-  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
-  Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
-  Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
-    This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
-
-**/
-
-//#include "ArmPlatform.h"
-Scope(_SB)
-{
-  Device (USB0)
-        {
-            Name (_HID, "PNP0D20")  // _HID: Hardware ID
-            Name (_CID, "HISI0D2" /* EHCI USB Controller without debug */)  // _CID: Compatible ID
-            Name (_CCA, One)  // _CCA: Cache Coherency Attribute
-            Method (_CRS, 0, Serialized)  // _CRS: Current Resource Settings
-            {
-                Name (RBUF, ResourceTemplate ()
-                {
-                    Memory32Fixed (ReadWrite,
-                        0xa7020000,         // Address Base
-                        0x00010000,         // Address Length
-                        )
-                    Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
-                    {
-                        0x00000041,
-                    }
-                })
-                Return (RBUF) /* \_SB_.USB0._CRS.RBUF */
-            }
-
-     Name (_DSD, Package () {
-              ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-              Package ()
-              {
-                  Package () {"interrupt-parent",Package() {\_SB.MBI0}}
-              }
-     })
-
-            Device (RHUB)
-            {
-                Name (_ADR, Zero)  // _ADR: Address
-                Device (PRT1)
-                {
-                    Name (_ADR, One)  // _ADR: Address
-                    Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
-                    {
-                        0xFF,
-                        Zero,
-                        Zero,
-                        Zero
-                    })
-                    Name (_PLD, Package (0x01)  // _PLD: Physical Location of Device
-                    {
-                        ToPLD (
-                            PLD_Revision       = 0x1,
-                            PLD_IgnoreColor    = 0x1,
-                            PLD_Red            = 0x0,
-                            PLD_Green          = 0x0,
-                            PLD_Blue           = 0x0,
-                            PLD_Width          = 0x0,
-                            PLD_Height         = 0x0,
-                            PLD_UserVisible    = 0x1,
-                            PLD_Dock           = 0x0,
-                            PLD_Lid            = 0x0,
-                            PLD_Panel          = "UNKNOWN",
-                            PLD_VerticalPosition = "UPPER",
-                            PLD_HorizontalPosition = "LEFT",
-                            PLD_Shape          = "UNKNOWN",
-                            PLD_GroupOrientation = 0x0,
-                            PLD_GroupToken     = 0x0,
-                            PLD_GroupPosition  = 0x0,
-                            PLD_Bay            = 0x0,
-                            PLD_Ejectable      = 0x0,
-                            PLD_EjectRequired  = 0x0,
-                            PLD_CabinetNumber  = 0x0,
-                            PLD_CardCageNumber = 0x0,
-                            PLD_Reference      = 0x0,
-                            PLD_Rotation       = 0x0,
-                            PLD_Order          = 0x0,
-                            PLD_VerticalOffset = 0x0,
-                            PLD_HorizontalOffset = 0x0)
-
-                    })
-                }
-
-                Device (PRT2)
-                {
-                    Name (_ADR, 0x02)  // _ADR: Address
-                    Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
-                    {
-                        Zero,
-                        0xFF,
-                        Zero,
-                        Zero
-                    })
-                }
-
-                Device (PRT3)
-                {
-                    Name (_ADR, 0x03)  // _ADR: Address
-                    Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
-                    {
-                        Zero,
-                        0xFF,
-                        Zero,
-                        Zero
-                    })
-                }
-
-                Device (PRT4)
-                {
-                    Name (_ADR, 0x04)  // _ADR: Address
-                    Name (_UPC, Package (0x04)  // _UPC: USB Port Capabilities
-                    {
-                        Zero,
-                        0xFF,
-                        Zero,
-                        Zero
-                    })
-                }
-            }
-        }
-}
-
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl
deleted file mode 100644
index 06c05aa..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/DsdtHi1610.asl
+++ /dev/null
@@ -1,29 +0,0 @@ 
-/** @file
-  Differentiated System Description Table Fields (DSDT)
-
-  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
-  Copyright (c) 2015, Hisilicon Limited. All rights reserved.<BR>
-  Copyright (c) 2015, Linaro Limited. All rights reserved.<BR>
-    This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
-
-**/
-
-#include "Pv660Platform.h"
-
-DefinitionBlock("DsdtTable.aml", "DSDT", 1, "HISI", "HISI-EVB", EFI_ACPI_ARM_OEM_REVISION) {
-     include ("Lpc.asl")
-     include ("D03Mbig.asl")
-     include ("CPU.asl")
-     include ("D03Usb.asl")
-     include ("D03Hns.asl")
-     include ("D03Sas.asl")
-     include ("D03Pci.asl")
-}
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl
deleted file mode 100644
index 0965afc..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Lpc.asl
+++ /dev/null
@@ -1,25 +0,0 @@ 
-/** @file
-*
-*  Copyright (c) 2016 Hisilicon Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-**/
-
-//
-// LPC
-//
-
-Device (LPC0)
-{
-  Name(_HID, "HISI0191")  // HiSi LPC
-  Name (_CRS, ResourceTemplate () {
-    Memory32Fixed (ReadWrite, 0xa01b0000, 0x1000)
-  })
-}
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sas.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sas.asl
deleted file mode 100644
index 4c3c642..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sas.asl
+++ /dev/null
@@ -1,152 +0,0 @@ 
-/** @file
-  Differentiated System Description Table Fields (DSDT)
-
-  Copyright (c) 2014, ARM Ltd. All rights reserved.<BR>
-    This program and the accompanying materials
-  are licensed and made available under the terms and conditions of the BSD License
-  which accompanies this distribution.  The full text of the license may be found at
-  http://opensource.org/licenses/bsd-license.php
-
-  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-Scope(_SB)
-{
-    Device(SAS0) {
-          Name(_HID, "HISI0161")
-    Name(_CCA, 1)
-          Name(_CRS, ResourceTemplate() {
-                  Memory32Fixed(ReadWrite, 0xc1000000, 0x10000)
-                  Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
-                  {
-      //phy irq(0~79)
-      259,263,264,
-      269,273,274,
-      279,283,284,
-      289,293,294,
-      299,303,304,
-      309,313,314,
-      319,323,324,
-      329,333,334,
-      }
-
-                  Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
-                  {
-      //cq irq (80~111)
-      336,337,338,339,340,341,342,343,
-      344,345,346,347,348,349,350,351,
-      352,353,354,355,356,357,358,359,
-      360,361,362,363,364,365,366,367,
-      }
-
-                  Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
-                  {
-      376, //chip fatal error irq(120)
-      381, //chip fatal error irq(125)
-                  }
-          })
-
-          Name (_DSD, Package () {
-              ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-              Package () {
-                  Package () {"interrupt-parent",Package() {\_SB.MBI1}},
-      Package (2) {"sas-addr", Package() {50, 01, 88, 20, 16, 00, 00, 0x0a}},
-      Package () {"queue-count", 32},
-      Package () {"phy-count", 8},
-              }
-          })
-
-    OperationRegion (CTL, SystemMemory, 0xC0000000, 0x10000)
-    Field (CTL, AnyAcc, NoLock, Preserve)
-    {
-      Offset (0x338),
-      CLK, 32,
-      CLKD, 32,
-      Offset (0xa60),
-      RST, 32,
-      DRST, 32,
-      Offset (0x5a30),
-      STS, 32,
-    }
-
-    Method (_RST, 0x0, Serialized)
-    {
-      Store(0x7ffff, RST)
-      Store(0x7ffff, CLKD)
-      Sleep(1)
-      Store(0x7ffff, DRST)
-      Store(0x7ffff, CLK)
-      Sleep(1)
-    }
-    }
-
-    Device(SAS1) {
-          Name(_HID, "HISI0161")
-    Name(_CCA, 1)
-          Name(_CRS, ResourceTemplate() {
-                  Memory32Fixed(ReadWrite, 0xb1000000, 0x10000)
-                  Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
-                  {
-      //phy irq(0~79)
-      259,263,264,
-      269,273,274,
-      279,283,284,
-      289,293,294,
-      299,303,304,
-      309,313,314,
-      319,323,324,
-      329,333,334,
-      }
-
-                  Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, ,, )
-                  {
-      //cq irq (80~111)
-      336,337,338,339,340,341,342,343,
-      344,345,346,347,348,349,350,351,
-      352,353,354,355,356,357,358,359,
-      360,361,362,363,364,365,366,367,
-      }
-
-                  Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, ,, )
-                  {
-      376, //chip fatal error irq(120)
-      381, //chip fatal error irq(125)
-                  }
-          })
-
-          Name (_DSD, Package () {
-              ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-              Package () {
-                  Package () {"interrupt-parent",Package() {\_SB.MBI3}},
-      Package (2) {"sas-addr", Package() {50, 01, 88, 20, 16, 00, 00, 00}},
-      Package () {"queue-count", 32},
-      Package () {"phy-count", 8},
-              }
-          })
-
-    OperationRegion (CTL, SystemMemory, 0xB0000000, 0x10000)
-    Field (CTL, AnyAcc, NoLock, Preserve)
-    {
-      Offset (0x318),
-      CLK, 32,
-      CLKD, 32,
-      Offset (0xa18),
-      RST, 32,
-      DRST, 32,
-      Offset (0x5a0c),
-      STS, 32,
-    }
-
-    Method (_RST, 0x0, Serialized)
-    {
-      Store(0x7ffff, RST)
-      Store(0x7ffff, CLKD)
-      Sleep(1)
-      Store(0x7ffff, DRST)
-      Store(0x7ffff, CLK)
-      Sleep(1)
-    }
-    }
-}
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sata.asl b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sata.asl
deleted file mode 100644
index 9ad2d96..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Dsdt/Sata.asl
+++ /dev/null
@@ -1,39 +0,0 @@ 
-/** @file
-*
-*  Copyright (c) 2011-2015, ARM Limited. All rights reserved.
-*  Copyright (c) 2015, Hisilicon Limited. All rights reserved.
-*  Copyright (c) 2015, Linaro Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-*  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
-*
-**/
-
-//
-// SATA AHCI
-//
-
-Device (AHCI)
-{
-  Name(_HID, "HISI0001")  // HiSi AHCI
-  Name (_CCA, 1)           // Cache-coherent controller
-  Name (_CRS, ResourceTemplate () {
-    Memory32Fixed (ReadWrite, 0xb1002800, 0x00000B00)
-    Memory32Fixed (ReadWrite, 0xb1000000, 0x00002800)
-    Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive,,,) { 382 }
-  })
-
-  Name (_DSD, Package () {
-    ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),
-    Package () {
-      Package () {"interrupt-parent",Package() {\_SB.MBI3}}
-    }
-  })
-}
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc b/Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc
deleted file mode 100644
index 6e8557e..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/MadtHi1610.aslc
+++ /dev/null
@@ -1,128 +0,0 @@ 
-/** @file
-*  Multiple APIC Description Table (MADT)
-*
-*  Copyright (c) 2012 - 2014, ARM Limited. All rights reserved.
-*  Copyright (c) 2015, Hisilicon Limited. All rights reserved.
-*  Copyright (c) 2015, Linaro Limited. All rights reserved.
-*
-*  This program and the accompanying materials
-*
-*  This program and the accompanying materials
-*  are licensed and made available under the terms and conditions of the BSD License
-*  which accompanies this distribution.  The full text of the license may be found at
-*  http://opensource.org/licenses/bsd-license.php
-*
-*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-*
-*  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
-*
-**/
-
-#include "Pv660Platform.h"
-
-#include <Library/AcpiLib.h>
-#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <IndustryStandard/Acpi.h>
-#include <Library/AcpiNextLib.h>
-
-// Differs from Juno, we have another affinity level beyond cluster and core
-// 0x20000 is only for socket 0
-#define PLATFORM_GET_MPID(ClusterId, CoreId)   (0x10000 | ((ClusterId) << 8) | (CoreId))
-
-//
-// Multiple APIC Description Table
-//
-#pragma pack (1)
-
-typedef struct {
-  EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER   Header;
-  EFI_ACPI_5_1_GIC_STRUCTURE                            GicInterfaces[16];
-  EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE                GicDistributor;
-  EFI_ACPI_6_0_GIC_ITS_STRUCTURE                      GicITS[1];
-} EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE;
-
-#pragma pack ()
-
-EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE Madt = {
-  {
-    ARM_ACPI_HEADER (
-      EFI_ACPI_1_0_APIC_SIGNATURE,
-      EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE,
-      EFI_ACPI_1_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION
-    ),
-    //
-    // MADT specific fields
-    //
-    0, // LocalApicAddress
-    0, // Flags
-  },
-  {
-    // Format: EFI_ACPI_5_1_GICC_STRUCTURE_INIT(GicId, AcpiCpuUid, Flags, PmuIrq, GicBase, GicVBase, GicHBase,
-    //                                          GsivId, GicRBase, Mpidr)
-    // Note: The GIC Structure of the primary CPU must be the first entry (see note in 5.2.12.14 GICC Structure of
-    //       ACPI v5.1).
-    //       The cores from a same cluster are kept together. It is not an ACPI requirement but in case the OSPM uses
-    //       the ACPI ARM Parking protocol, it might want to wake up the cores in the order of this table.
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        0, 0, PLATFORM_GET_MPID(0, 0),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x100000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        1, 1, PLATFORM_GET_MPID(0, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x130000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        2, 2, PLATFORM_GET_MPID(0, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x160000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        3, 3, PLATFORM_GET_MPID(0, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x190000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        4, 4, PLATFORM_GET_MPID(1, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x1C0000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        5, 5, PLATFORM_GET_MPID(1, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x1F0000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        6, 6, PLATFORM_GET_MPID(1, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x220000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        7, 7, PLATFORM_GET_MPID(1, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x250000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        8, 8, PLATFORM_GET_MPID(2, 0),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x280000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        9, 9, PLATFORM_GET_MPID(2, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x2B0000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        10, 10, PLATFORM_GET_MPID(2, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x2E0000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        11, 11, PLATFORM_GET_MPID(2, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x310000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        12, 12, PLATFORM_GET_MPID(3, 0), EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x340000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        13, 13, PLATFORM_GET_MPID(3, 1),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x370000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        14, 14, PLATFORM_GET_MPID(3, 2),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x3A0000 /* GicRBase */),
-    EFI_ACPI_5_1_GICC_STRUCTURE_INIT(
-        15, 15, PLATFORM_GET_MPID(3, 3),  EFI_ACPI_5_0_GIC_ENABLED, 23, FixedPcdGet64 (PcdGicInterruptInterfaceBase),
-        FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x20000, FixedPcdGet64 (PcdGicInterruptInterfaceBase) + 0x10000, 25, FixedPcdGet64 (PcdGicDistributorBase) + 0x3D0000 /* GicRBase */),
-  },
-
-  EFI_ACPI_6_0_GIC_DISTRIBUTOR_INIT(0, FixedPcdGet64 (PcdGicDistributorBase), 0, 0x4),
-  {
-    EFI_ACPI_6_0_GIC_ITS_INIT(0,0xC6000000),
-  }
-};
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Madt;
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Slit.aslc b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Slit.aslc
deleted file mode 100644
index 2fa2959..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Slit.aslc
+++ /dev/null
@@ -1,81 +0,0 @@ 
-/*
- * Copyright (c) 2013 Linaro Limited
- *
- * All rights reserved. This program and the accompanying materials
- * are made available under the terms of the BSD License which accompanies
- * this distribution, and is available at
- * http://opensource.org/licenses/bsd-license.php
- *
- * Contributors:
- *     Yi Li - yi.li@linaro.org
-*/
-
-#include <IndustryStandard/Acpi.h>
-#include "Pv660Platform.h"
-
-#define EFI_ACPI_SYSTEM_LOCALITIES_ENTRY_COUNT 0x0000000000000014
-
-#pragma pack(1)
-typedef struct {
-  UINT8   Entry[EFI_ACPI_SYSTEM_LOCALITIES_ENTRY_COUNT];
-} EFI_ACPI_5_0_NUMBER_OF_SYSTEM_LOCALITIES_STRUCTURE;
-
-typedef struct {
-  EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_HEADER    Header;
-  EFI_ACPI_5_0_NUMBER_OF_SYSTEM_LOCALITIES_STRUCTURE                NumSlit[EFI_ACPI_SYSTEM_LOCALITIES_ENTRY_COUNT];
-
-} EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE;
-#pragma pack()
-
-//
-// System Locality Information Table
-// Please modify all values in Slit.h only.
-//
-EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE Slit = {
-  {
-    {
-      EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE,
-      sizeof (EFI_ACPI_5_0_SYSTEM_LOCALITY_INFORMATION_TABLE),
-      EFI_ACPI_5_0_SYSTEM_LOCALITY_DISTANCE_INFORMATION_TABLE_REVISION,
-      0x00,                                                     // Checksum will be updated at runtime
-      {EFI_ACPI_ARM_OEM_ID},
-      EFI_ACPI_ARM_OEM_TABLE_ID,
-      EFI_ACPI_ARM_OEM_REVISION,
-      EFI_ACPI_ARM_CREATOR_ID,
-      EFI_ACPI_ARM_CREATOR_REVISION,
-    },
-    //
-    // Beginning of SLIT specific fields
-    //
-    EFI_ACPI_SYSTEM_LOCALITIES_ENTRY_COUNT,
-  },
-  {
-    {{0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27}}, //Locality   0
-    {{0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26}}, //Locality   1
-    {{0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23, 0x24, 0x25}}, //Locality   2
-    {{0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23, 0x24}}, //Locality   3
-    {{0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22, 0x23}}, //Locality   4
-    {{0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21, 0x22}}, //Locality   5
-    {{0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20, 0x21}}, //Locality   6
-    {{0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F, 0x20}}, //Locality   7
-    {{0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F}}, //Locality   8
-    {{0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E}}, //Locality   9
-    {{0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D}}, //Locality   10
-    {{0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B, 0x1C}}, //Locality   11
-    {{0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19, 0x1A, 0x1B}}, //Locality   12
-    {{0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18, 0x19, 0x1A}}, //Locality   13
-    {{0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17, 0x18, 0x19}}, //Locality   14
-    {{0x23, 0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16, 0x17, 0x18}}, //Locality   15
-    {{0x24, 0x23, 0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10, 0x16, 0x17}}, //Locality   16
-    {{0x25, 0x24, 0x23, 0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A, 0x15, 0x16}}, //Locality   17
-    {{0x26, 0x25, 0x24, 0x23, 0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x15, 0x0A, 0x10}}, //Locality   18
-    {{0x27, 0x26, 0x25, 0x24, 0x23, 0x22, 0x21, 0x20, 0x1F, 0x1E, 0x1D, 0x1C, 0x1B, 0x1A, 0x19, 0x18, 0x17, 0x16, 0x10, 0x0A}}, //Locality   19
-  },
-};
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Slit;
-
diff --git a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Srat.aslc b/Chips/Hisilicon/Pv660/Pv660AcpiTables/Srat.aslc
deleted file mode 100644
index 1d38191..0000000
--- a/Chips/Hisilicon/Pv660/Pv660AcpiTables/Srat.aslc
+++ /dev/null
@@ -1,115 +0,0 @@ 
-/*
- * Copyright (c) 2013 Linaro Limited
- *
- * All rights reserved. This program and the accompanying materials
- * are made available under the terms of the BSD License which accompanies
- * this distribution, and is available at
- * http://opensource.org/licenses/bsd-license.php
- *
- * Contributors:
- *     Yi Li - yi.li@linaro.org
- *
- *  Based on the files under ArmPlatformPkg/ArmJunoPkg/AcpiTables/
-*/
-
-#include <IndustryStandard/Acpi.h>
-#include "Pv660Platform.h"
-#include <Library/AcpiLib.h>
-#include <Library/AcpiNextLib.h>
-
-
-//
-// Define the number of each table type.
-// This is where the table layout is modified.
-//
-#define EFI_ACPI_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE_COUNT  4
-#define EFI_ACPI_MEMORY_AFFINITY_STRUCTURE_COUNT                      4
-
-
-#pragma pack(1)
-typedef struct {
-  EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER          Header;
-  EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE  Apic;
-  EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE                      Memory[2];
-  EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE                        GICC[16];
-} EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE;
-
-#pragma pack()
-
-
-//
-// Static Resource Affinity Table definition
-//
-EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE Srat = {
-  {
-    {EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE,
-    sizeof (EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE),
-    EFI_ACPI_5_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION,
-    0x00,                                                     // Checksum will be updated at runtime
-    {EFI_ACPI_ARM_OEM_ID},
-    EFI_ACPI_ARM_OEM_TABLE_ID,
-    EFI_ACPI_ARM_OEM_REVISION,
-    EFI_ACPI_ARM_CREATOR_ID,
-    EFI_ACPI_ARM_CREATOR_REVISION},
-    /*Reserved*/
-    0x00000001,                                  // Reserved to be 1 for backward compatibility
-    EFI_ACPI_RESERVED_QWORD
-  },
-  /**/
-  {
-      0x00,                                     // Subtable Type:Processor Local APIC/SAPIC Affinity
-      sizeof(EFI_ACPI_5_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY_STRUCTURE),                                     //Length
-      0x00,                                     //Proximity Domain Low(8)
-      0x00,                                     //Apic ID
-      0x00000001,                               //Flags
-      0x00,                                     //Local Sapic EID
-      {0,0,0},                                     //Proximity Domain High(24)
-      0x00000000,                               //ClockDomain
-  },
-  //
-  //
-  // Memory Affinity
-  //
-  {
-    EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000000,0x00000000,0x40000000,0x00000000,0x00000001),
-    EFI_ACPI_5_0_MEMORY_AFFINITY_STRUCTURE_INIT(0x00000000,0x40000000,0x00000002,0xC0000000,0x00000001,0x00000001),
-  },
-
-  /*Processor Local x2APIC Affinity*/
-  //{
-  //   0x02,                                              // Subtable Type:Processor Local x2APIC Affinity
-  //   sizeof(EFI_ACPI_5_0_PROCESSOR_LOCAL_X2APIC_AFFINITY_STRUCTURE),
-  //   {0,0},                                             //Reserved1
-  //   0x00000000,                                        //Proximity Domain
-  //   0x00000000,                                        //Apic ID
-  //   0x00000001,                                        //Flags
-  //   0x00000000,                                        //Clock Domain
-  //   {0,0,0,0},                                         //Reserved2
-  //},
-
-  {
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000000,0x00000001,0x00000000),   //GICC Affinity Processor 0
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000001,0x00000001,0x00000000),   //GICC Affinity Processor 1
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000002,0x00000001,0x00000000),   //GICC Affinity Processor 2
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000003,0x00000001,0x00000000),   //GICC Affinity Processor 3
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000004,0x00000001,0x00000000),   //GICC Affinity Processor 4
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000005,0x00000001,0x00000000),   //GICC Affinity Processor 5
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000006,0x00000001,0x00000000),   //GICC Affinity Processor 6
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000007,0x00000001,0x00000000),   //GICC Affinity Processor 7
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000008,0x00000001,0x00000000),   //GICC Affinity Processor 8
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x00000009,0x00000001,0x00000000),   //GICC Affinity Processor 9
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000A,0x00000001,0x00000000),   //GICC Affinity Processor 10
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000B,0x00000001,0x00000000),   //GICC Affinity Processor 11
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000C,0x00000001,0x00000000),   //GICC Affinity Processor 12
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000D,0x00000001,0x00000000),   //GICC Affinity Processor 13
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000E,0x00000001,0x00000000),   //GICC Affinity Processor 14
-    EFI_ACPI_5_1_GICC_AFFINITY_STRUCTURE_INIT(0x00000000,0x0000000F,0x00000001,0x00000000)    //GICC Affinity Processor 15
-  },
-};
-
-//
-// Reference the table being generated to prevent the optimizer from removing the
-// data structure from the executable
-//
-VOID* CONST ReferenceAcpiTable = &Srat;
-