Message ID | 20240828-add_initial_support_for_qcs615-v1-3-5599869ea10f@quicinc.com |
---|---|
State | Superseded |
Headers | show
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Wed, 28 Aug 2024 02:02:45 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA03.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 47S22hgl024664 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 28 Aug 2024 02:02:44 GMT Received: from lijuang2-gv.ap.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 27 Aug 2024 19:02:38 -0700 From: Lijuan Gao <quic_lijuang@quicinc.com> Date: Wed, 28 Aug 2024 10:02:13 +0800 Subject: [PATCH 3/6] dt-bindings: arm: qcom,ids: add SoC ID for QCS615 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20240828-add_initial_support_for_qcs615-v1-3-5599869ea10f@quicinc.com> References: <20240828-add_initial_support_for_qcs615-v1-0-5599869ea10f@quicinc.com> In-Reply-To: <20240828-add_initial_support_for_qcs615-v1-0-5599869ea10f@quicinc.com> To: Thomas Gleixner <tglx@linutronix.de>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konradybcio@kernel.org> CC: <kernel@quicinc.com>, <linux-arm-msm@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <devicetree@vger.kernel.org>, Lijuan Gao <quic_lijuang@quicinc.com> X-Mailer: b4 0.15-dev-99b12 X-Developer-Signature: v=1; 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diff --git a/include/dt-bindings/arm/qcom,ids.h b/include/dt-bindings/arm/qcom,ids.h index 8332f8d82f96..73a69fc535f6 100644 --- a/include/dt-bindings/arm/qcom,ids.h +++ b/include/dt-bindings/arm/qcom,ids.h @@ -278,6 +278,7 @@ #define QCOM_ID_IPQ5321 650 #define QCOM_ID_QCS8300 674 #define QCOM_ID_QCS8275 675 +#define QCOM_ID_QCS615 680 /* * The board type and revision information, used by Qualcomm bootloaders and
Add the ID for the Qualcomm QCS615 SoC. Signed-off-by: Lijuan Gao <quic_lijuang@quicinc.com> --- include/dt-bindings/arm/qcom,ids.h | 1 + 1 file changed, 1 insertion(+)