diff mbox

[2/5] arm64: dts: exynos: Add missing parent clocks to audio block in Exynos 5433 SoC

Message ID 1479301615-11240-3-git-send-email-m.szyprowski@samsung.com
State Superseded
Headers show

Commit Message

Marek Szyprowski Nov. 16, 2016, 1:06 p.m. UTC
Audio pll and oscilator clocks are proper parent clocks for AUD CMU.
They are not visible as such on first glance on Exynos 5433 SoC docs,
but they are needed for this CMU to operate properly.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

---
 arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 ++
 1 file changed, 2 insertions(+)

-- 
1.9.1

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Comments

On 11/16/2016 02:06 PM, Marek Szyprowski wrote:
> Audio pll and oscilator clocks are proper parent clocks for AUD CMU.


s/pll/PLL, s/oscilator/oscillator

> They are not visible as such on first glance on Exynos 5433 SoC docs,

> but they are needed for this CMU to operate properly.

> 

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>


Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>

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Chanwoo Choi Nov. 16, 2016, 4:35 p.m. UTC | #2
Hi Marek,

2016-11-16 22:06 GMT+09:00 Marek Szyprowski <m.szyprowski@samsung.com>:
> Audio pll and oscilator clocks are proper parent clocks for AUD CMU.

> They are not visible as such on first glance on Exynos 5433 SoC docs,

> but they are needed for this CMU to operate properly.

>

> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>

> ---

>  arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 ++

>  1 file changed, 2 insertions(+)

>

> diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi

> index 6564875..a80eb4c 100644

> --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi

> +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi

> @@ -374,6 +374,8 @@

>                         compatible = "samsung,exynos5433-cmu-aud";

>                         reg = <0x114c0000 0x1000>;

>                         #clock-cells = <1>;

> +                       clock-names = "oscclk", "fout_aud_pll";

> +                       clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>;

>                 };

>

>                 cmu_bus0: clock-controller@13600000 {


Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>


Also, you should update the binding documentation of exynos5433's clock[1].
[1] Documentation/devicetree/bindings/clock/exynos5433-clock.txt

Best Regards,
Chanwoo Choi
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diff mbox

Patch

diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
index 6564875..a80eb4c 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
@@ -374,6 +374,8 @@ 
 			compatible = "samsung,exynos5433-cmu-aud";
 			reg = <0x114c0000 0x1000>;
 			#clock-cells = <1>;
+			clock-names = "oscclk", "fout_aud_pll";
+			clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>;
 		};
 
 		cmu_bus0: clock-controller@13600000 {