diff mbox series

[v15,5/5] iommu/arm-smmu: add ACTLR data and support for qcom_smmu_500

Message ID 20240920155813.3434021-6-quic_bibekkum@quicinc.com
State Superseded
Headers show
Series iommu/arm-smmu: introduction of ACTLR implementation for Qualcomm SoCs | expand

Commit Message

Bibek Kumar Patro Sept. 20, 2024, 3:58 p.m. UTC
Add ACTLR data table for qcom_smmu_500 including
corresponding data entry and set prefetch value by
way of a list of compatible strings.

Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
---
 drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 24 ++++++++++++++++++++++
 1 file changed, 24 insertions(+)

--
2.34.1

Comments

Bibek Kumar Patro Sept. 27, 2024, 7:53 p.m. UTC | #1
On 9/24/2024 3:09 PM, Dmitry Baryshkov wrote:
> On Sat, Sep 21, 2024 at 01:29:04AM GMT, Bibek Kumar Patro wrote:
>>
>>
>> On 9/20/2024 9:48 PM, Dmitry Baryshkov wrote:
>>> On Fri, Sep 20, 2024 at 09:28:13PM GMT, Bibek Kumar Patro wrote:
>>>> Add ACTLR data table for qcom_smmu_500 including
>>>> corresponding data entry and set prefetch value by
>>>> way of a list of compatible strings.
>>>>
>>>> Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
>>>> ---
>>>>    drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 24 ++++++++++++++++++++++
>>>>    1 file changed, 24 insertions(+)
>>>>
>>>> diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>>>> index 4ac272d05843..e8f936a446df 100644
>>>> --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>>>> +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
>>>> @@ -25,8 +25,31 @@
>>>>
>>>>    #define CPRE			(1 << 1)
>>>>    #define CMTLB			(1 << 0)
>>>> +#define PREFETCH_SHIFT		8
>>>> +#define PREFETCH_DEFAULT	0
>>>> +#define PREFETCH_SHALLOW	(1 << PREFETCH_SHIFT)
>>>> +#define PREFETCH_MODERATE	(2 << PREFETCH_SHIFT)
>>>> +#define PREFETCH_DEEP		(3 << PREFETCH_SHIFT)
>>>>    #define GFX_ACTLR_PRR		(1 << 5)
>>>>
>>>> +static const struct of_device_id qcom_smmu_actlr_client_of_match[] = {
>>>> +	{ .compatible = "qcom,adreno",
>>>> +			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
>>>> +	{ .compatible = "qcom,adreno-gmu",
>>>> +			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
>>>> +	{ .compatible = "qcom,adreno-smmu",
>>>> +			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
>>>> +	{ .compatible = "qcom,fastrpc",
>>>> +			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
>>>> +	{ .compatible = "qcom,sc7280-mdss",
>>>> +			.data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
>>>> +	{ .compatible = "qcom,sc7280-venus",
>>>> +			.data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
>>>> +	{ .compatible = "qcom,sm8550-mdss",
>>>> +			.data = (const void *) (PREFETCH_DEFAULT | CMTLB) },
>>>> +	{ }
>>>> +};
>>>
>>> Wow, this looks really nice now!
>>>
>>
>> I am also in favor of this compatible based approach now,
>> as it looks to be much cleaner implementation.
> 
> 
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> 
> 

Hi Robin/Will, let me know if you have any suggestions/inputs on this 
patch. If everything looks fine, I'll send the next iteration with 
Dmitry's inputs and update tags.

Thanks & regards,
Bibek

>>
>>>> +
>>>>    static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu)
>>>>    {
>>>>    	return container_of(smmu, struct qcom_smmu, smmu);
>>>> @@ -640,6 +663,7 @@ static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
>>>>    	.impl = &qcom_smmu_500_impl,
>>>>    	.adreno_impl = &qcom_adreno_smmu_500_impl,
>>>>    	.cfg = &qcom_smmu_impl0_cfg,
>>>> +	.client_match = qcom_smmu_actlr_client_of_match,
>>>>    };
>>>>
>>>>    /*
>>>> --
>>>> 2.34.1
>>>>
>>>
>
diff mbox series

Patch

diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
index 4ac272d05843..e8f936a446df 100644
--- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
+++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c
@@ -25,8 +25,31 @@ 

 #define CPRE			(1 << 1)
 #define CMTLB			(1 << 0)
+#define PREFETCH_SHIFT		8
+#define PREFETCH_DEFAULT	0
+#define PREFETCH_SHALLOW	(1 << PREFETCH_SHIFT)
+#define PREFETCH_MODERATE	(2 << PREFETCH_SHIFT)
+#define PREFETCH_DEEP		(3 << PREFETCH_SHIFT)
 #define GFX_ACTLR_PRR		(1 << 5)

+static const struct of_device_id qcom_smmu_actlr_client_of_match[] = {
+	{ .compatible = "qcom,adreno",
+			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
+	{ .compatible = "qcom,adreno-gmu",
+			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
+	{ .compatible = "qcom,adreno-smmu",
+			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
+	{ .compatible = "qcom,fastrpc",
+			.data = (const void *) (PREFETCH_DEEP | CPRE | CMTLB) },
+	{ .compatible = "qcom,sc7280-mdss",
+			.data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
+	{ .compatible = "qcom,sc7280-venus",
+			.data = (const void *) (PREFETCH_SHALLOW | CPRE | CMTLB) },
+	{ .compatible = "qcom,sm8550-mdss",
+			.data = (const void *) (PREFETCH_DEFAULT | CMTLB) },
+	{ }
+};
+
 static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu)
 {
 	return container_of(smmu, struct qcom_smmu, smmu);
@@ -640,6 +663,7 @@  static const struct qcom_smmu_match_data qcom_smmu_500_impl0_data = {
 	.impl = &qcom_smmu_500_impl,
 	.adreno_impl = &qcom_adreno_smmu_500_impl,
 	.cfg = &qcom_smmu_impl0_cfg,
+	.client_match = qcom_smmu_actlr_client_of_match,
 };

 /*