Message ID | 20240924100602.3813725-3-vladimir.zapolskiy@linaro.org |
---|---|
State | New |
Headers | show
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arm64: dts: qcom: enable dispcc controllers by default
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diff --git a/arch/arm64/boot/dts/qcom/sm8450-qrd.dts b/arch/arm64/boot/dts/qcom/sm8450-qrd.dts index 7b62ead68e77..8c39fbcaad80 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-qrd.dts @@ -349,6 +349,10 @@ vreg_l6e_1p2: ldo6 { }; }; +&dispcc { + status = "disabled"; +}; + &pcie0 { status = "okay"; };
A platform display clock controller is expected to be enabled by default for all boards, however in particular cases preset display clock setting is expected. To avoid any probable regression before enabling display clock controller for all SM8450 platforms disable it for SM8450-QRD board only. Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> --- arch/arm64/boot/dts/qcom/sm8450-qrd.dts | 4 ++++ 1 file changed, 4 insertions(+)