From patchwork Tue Nov 22 07:49:17 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhangfei Gao X-Patchwork-Id: 83344 Delivered-To: patch@linaro.org Received: by 10.182.1.168 with SMTP id 8csp1999409obn; Mon, 21 Nov 2016 23:50:27 -0800 (PST) X-Received: by 10.99.143.90 with SMTP id r26mr40904323pgn.164.1479801027079; Mon, 21 Nov 2016 23:50:27 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q187si15139579pfb.256.2016.11.21.23.50.26; Mon, 21 Nov 2016 23:50:27 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753532AbcKVHu0 (ORCPT + 7 others); Tue, 22 Nov 2016 02:50:26 -0500 Received: from mail-pf0-f177.google.com ([209.85.192.177]:34926 "EHLO mail-pf0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752869AbcKVHuZ (ORCPT ); Tue, 22 Nov 2016 02:50:25 -0500 Received: by mail-pf0-f177.google.com with SMTP id i88so2963684pfk.2 for ; Mon, 21 Nov 2016 23:50:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=qNiqDeyWJF8eH5EvE+r0s5zhBX//0MzIs70fNosVfPQ=; b=WBKdciliKrv6RlGSrqXoWHtP3xxKxFC+Gei4p88Q6cax/jT2H7t1AK7FGyPy+cifmI NSsfX2w8RFBVso+/1pAyjzFzSIMTEb8zDcl18Hz0So46eC6K5xBOg/93D4tigU0y9iH8 4Mwee3cuhjtJD0EWO1pLw5Ox1+xwpNaWaEFxg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=qNiqDeyWJF8eH5EvE+r0s5zhBX//0MzIs70fNosVfPQ=; b=EmgSlSfqJOb7MLV8Qxho98HOkfM/95yuC5sYE4VhG5OkFds19iAZWMl3SemPZ4NmDS kwX5egbaCGVfmXy/vxa1Kk/MJfh/5gQRAOkawH910eSZOlOwEaEjG0RLWLyo2SNXAXv2 r209Ab2T/BRhAGiAks+zZgy+hhM6SsKcPlu78wcwwdFC3McsA0PgXNfaVTR/RQvdQ4ZZ aAUCkBZ3nJTnD2hQY00FsDfFz+c/NQY5+agcNI/UbBHpqc32Q9DLz/aCKKTKCbQGhFE2 KBvRYM/nzb/bQxIFSRiybqIBhmI53pNeKT8nlMW66fteiI1HvgJa7bMhymOgjcl6Vk8J VadA== X-Gm-Message-State: AKaTC01VXFYOfnEsT9wU/bqVJ9f6jHwUhV48i6W5BfvdkE5FyFT+A3VFShAJWjAtlDCrU5bR X-Received: by 10.99.139.199 with SMTP id j190mr41339428pge.115.1479801024458; Mon, 21 Nov 2016 23:50:24 -0800 (PST) Received: from localhost.localdomain ([104.237.91.214]) by smtp.gmail.com with ESMTPSA id d1sm42635008pfb.76.2016.11.21.23.50.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 21 Nov 2016 23:50:24 -0800 (PST) From: Zhangfei Gao To: Philipp Zabel , Rob Herring , haojian.zhuang@linaro.org, xuwei5@hisilicon.com, Chen Feng , Xinliang Liu , Xia Qing , Jiancheng Xue Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Zhangfei Gao Subject: [PATCH 2/6] dt-bindings: Document the hi3660 reset bindings Date: Tue, 22 Nov 2016 15:49:17 +0800 Message-Id: <1479800961-6249-3-git-send-email-zhangfei.gao@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1479800961-6249-1-git-send-email-zhangfei.gao@linaro.org> References: <1479800961-6249-1-git-send-email-zhangfei.gao@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add DT bindings documentation for hi3660 SoC reset controller. Signed-off-by: Zhangfei Gao --- .../bindings/reset/hisilicon,hi3660-reset.txt | 42 ++++++++++++++++++++++ 1 file changed, 42 insertions(+) create mode 100644 Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt new file mode 100644 index 0000000..20e03a8 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/hisilicon,hi3660-reset.txt @@ -0,0 +1,42 @@ +Hisilicon System Reset Controller +====================================== + +Please also refer to reset.txt in this directory for common reset +controller binding usage. + +The reset controller registers are part of the system-ctl block on +hi3660 SoC. + +Required properties: +- compatible: should be one of the following: + - "hisilicon,hi3660-reset-crgctrl : reset control for peripherals in crgctrl. + - "hisilicon,hi3660-reset-iomcu : reset control for peripherals in iomcu. +- hisi,rst-syscon: phandle of the reset's syscon. +- #reset-cells: 1, see below + +Example: + crg_ctrl: crg_ctrl@fff35000 { + compatible = "hisilicon,hi3660-crgctrl", "syscon"; + reg = <0x0 0xfff35000 0x0 0x1000>; + #clock-cells = <1>; + }; + + crg_rst: crg_rst_controller { + compatible = "hisilicon,hi3660-reset-crgctrl"; + #reset-cells = <1>; + hisi,rst-syscon = <&crg_ctrl>; + }; + +Specifying reset lines connected to IP modules +============================================== +example: + + ufs: ufs@..... { + ... + resets = <&crg_rst HI3660_RST_UFS>, + <&crg_rst HI3660_RST_UFS_ASSERT>; + reset-names = "rst", "assert"; + ... + }; + +The index could be found in .