| Message ID | 20241009150855.804605-23-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | accel/tcg: Convert victim tlb to IntervalTree | expand |
On 10/9/24 08:08, Richard Henderson wrote: > Now that all targets have been converted to tlb_fill_align, > remove the tlb_fill hook. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > include/hw/core/tcg-cpu-ops.h | 10 ---------- > accel/tcg/cputlb.c | 19 ++++--------------- > 2 files changed, 4 insertions(+), 25 deletions(-) > > diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h > index c932690621..e73c8a03de 100644 > --- a/include/hw/core/tcg-cpu-ops.h > +++ b/include/hw/core/tcg-cpu-ops.h > @@ -157,16 +157,6 @@ struct TCGCPUOps { > bool (*tlb_fill_align)(CPUState *cpu, CPUTLBEntryFull *out, vaddr addr, > MMUAccessType access_type, int mmu_idx, > MemOp memop, int size, bool probe, uintptr_t ra); > - /** > - * @tlb_fill: Handle a softmmu tlb miss > - * > - * If the access is valid, call tlb_set_page and return true; > - * if the access is invalid and probe is true, return false; > - * otherwise raise an exception and do not return. > - */ > - bool (*tlb_fill)(CPUState *cpu, vaddr address, int size, > - MMUAccessType access_type, int mmu_idx, > - bool probe, uintptr_t retaddr); > /** > * @do_transaction_failed: Callback for handling failed memory transactions > * (ie bus faults or external aborts; not MMU faults) > diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c > index 47b9557bb8..55c7bf737b 100644 > --- a/accel/tcg/cputlb.c > +++ b/accel/tcg/cputlb.c > @@ -1251,23 +1251,12 @@ static bool tlb_fill_align(CPUState *cpu, vaddr addr, MMUAccessType type, > int mmu_idx, MemOp memop, int size, > bool probe, uintptr_t ra) > { > - const TCGCPUOps *ops = cpu->cc->tcg_ops; > CPUTLBEntryFull full; > > - if (ops->tlb_fill_align) { > - if (ops->tlb_fill_align(cpu, &full, addr, type, mmu_idx, > - memop, size, probe, ra)) { > - tlb_set_page_full(cpu, mmu_idx, addr, &full); > - return true; > - } > - } else { > - /* Legacy behaviour is alignment before paging. */ > - if (addr & ((1u << memop_alignment_bits(memop)) - 1)) { > - ops->do_unaligned_access(cpu, addr, type, mmu_idx, ra); > - } > - if (ops->tlb_fill(cpu, addr, size, type, mmu_idx, probe, ra)) { > - return true; > - } > + if (cpu->cc->tcg_ops->tlb_fill_align(cpu, &full, addr, type, mmu_idx, > + memop, size, probe, ra)) { > + tlb_set_page_full(cpu, mmu_idx, addr, &full); > + return true; > } > assert(probe); > return false; Looks good! Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h index c932690621..e73c8a03de 100644 --- a/include/hw/core/tcg-cpu-ops.h +++ b/include/hw/core/tcg-cpu-ops.h @@ -157,16 +157,6 @@ struct TCGCPUOps { bool (*tlb_fill_align)(CPUState *cpu, CPUTLBEntryFull *out, vaddr addr, MMUAccessType access_type, int mmu_idx, MemOp memop, int size, bool probe, uintptr_t ra); - /** - * @tlb_fill: Handle a softmmu tlb miss - * - * If the access is valid, call tlb_set_page and return true; - * if the access is invalid and probe is true, return false; - * otherwise raise an exception and do not return. - */ - bool (*tlb_fill)(CPUState *cpu, vaddr address, int size, - MMUAccessType access_type, int mmu_idx, - bool probe, uintptr_t retaddr); /** * @do_transaction_failed: Callback for handling failed memory transactions * (ie bus faults or external aborts; not MMU faults) diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 47b9557bb8..55c7bf737b 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1251,23 +1251,12 @@ static bool tlb_fill_align(CPUState *cpu, vaddr addr, MMUAccessType type, int mmu_idx, MemOp memop, int size, bool probe, uintptr_t ra) { - const TCGCPUOps *ops = cpu->cc->tcg_ops; CPUTLBEntryFull full; - if (ops->tlb_fill_align) { - if (ops->tlb_fill_align(cpu, &full, addr, type, mmu_idx, - memop, size, probe, ra)) { - tlb_set_page_full(cpu, mmu_idx, addr, &full); - return true; - } - } else { - /* Legacy behaviour is alignment before paging. */ - if (addr & ((1u << memop_alignment_bits(memop)) - 1)) { - ops->do_unaligned_access(cpu, addr, type, mmu_idx, ra); - } - if (ops->tlb_fill(cpu, addr, size, type, mmu_idx, probe, ra)) { - return true; - } + if (cpu->cc->tcg_ops->tlb_fill_align(cpu, &full, addr, type, mmu_idx, + memop, size, probe, ra)) { + tlb_set_page_full(cpu, mmu_idx, addr, &full); + return true; } assert(probe); return false;
Now that all targets have been converted to tlb_fill_align, remove the tlb_fill hook. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- include/hw/core/tcg-cpu-ops.h | 10 ---------- accel/tcg/cputlb.c | 19 ++++--------------- 2 files changed, 4 insertions(+), 25 deletions(-)