Message ID | 39b23d468eea2714a24a94cb6c20aef5aff492e6.1729074076.git.mchehab+huawei@kernel.org |
---|---|
State | Superseded |
Headers | show |
Series | Media: fix several issues on drivers | expand |
Hi Mauro, On Wed, Oct 16, 2024 at 12:22:24PM +0200, Mauro Carvalho Chehab wrote: > The PLL checks are comparing 64 bit integers with 32 bit > ones. Depending on the values of the variables, this may > underflow. > > Fix it ensuring that both sides of the expression are u64. > > Fixes: 852b50aeed15 ("media: On Semi AR0521 sensor driver") > Cc: stable@vger.kernel.org > Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> > --- > drivers/media/i2c/ar0521.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/media/i2c/ar0521.c b/drivers/media/i2c/ar0521.c > index fc27238dd4d3..24873149096c 100644 > --- a/drivers/media/i2c/ar0521.c > +++ b/drivers/media/i2c/ar0521.c > @@ -255,10 +255,10 @@ static u32 calc_pll(struct ar0521_dev *sensor, u32 freq, u16 *pre_ptr, u16 *mult > continue; /* Minimum value */ > if (new_mult > 254) > break; /* Maximum, larger pre won't work either */ > - if (sensor->extclk_freq * (u64)new_mult < AR0521_PLL_MIN * > + if (sensor->extclk_freq * (u64)new_mult < (u64)AR0521_PLL_MIN * > new_pre) > continue; > - if (sensor->extclk_freq * (u64)new_mult > AR0521_PLL_MAX * > + if (sensor->extclk_freq * (u64)new_mult > (u64)AR0521_PLL_MAX * > new_pre) > break; /* Larger pre won't work either */ > new_pll = div64_round_up(sensor->extclk_freq * (u64)new_mult, Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
diff --git a/drivers/media/i2c/ar0521.c b/drivers/media/i2c/ar0521.c index fc27238dd4d3..24873149096c 100644 --- a/drivers/media/i2c/ar0521.c +++ b/drivers/media/i2c/ar0521.c @@ -255,10 +255,10 @@ static u32 calc_pll(struct ar0521_dev *sensor, u32 freq, u16 *pre_ptr, u16 *mult continue; /* Minimum value */ if (new_mult > 254) break; /* Maximum, larger pre won't work either */ - if (sensor->extclk_freq * (u64)new_mult < AR0521_PLL_MIN * + if (sensor->extclk_freq * (u64)new_mult < (u64)AR0521_PLL_MIN * new_pre) continue; - if (sensor->extclk_freq * (u64)new_mult > AR0521_PLL_MAX * + if (sensor->extclk_freq * (u64)new_mult > (u64)AR0521_PLL_MAX * new_pre) break; /* Larger pre won't work either */ new_pll = div64_round_up(sensor->extclk_freq * (u64)new_mult,
The PLL checks are comparing 64 bit integers with 32 bit ones. Depending on the values of the variables, this may underflow. Fix it ensuring that both sides of the expression are u64. Fixes: 852b50aeed15 ("media: On Semi AR0521 sensor driver") Cc: stable@vger.kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> --- drivers/media/i2c/ar0521.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)