gpio/msm-v1: re-read IRQ flags on each iteration

Message ID 1336738032-14940-1-git-send-email-linus.walleij@stericsson.com
State New
Headers show

Commit Message

Linus Walleij May 11, 2012, 12:07 p.m.
From: Linus Walleij <linus.walleij@linaro.org>

We have recently found a number or erroneous IRQ handlers in
the kernel where the flag iterator loop miss IRQs that get
raised when the loop is executing. This was spotted in the
MSM v1 GPIO driver by Julia Lawall using this cocinelle
snippet:

@@
expression pending,gedr,e1;
statement S;
@@

*pending = readl(gedr);
... when != pending = e1
while (pending) S

Reported-by: Julia Lawall <julia.lawall@lip6.fr>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
 drivers/gpio/gpio-msm-v1.c |    6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Patch

diff --git a/drivers/gpio/gpio-msm-v1.c b/drivers/gpio/gpio-msm-v1.c
index 52a4d42..68ca760 100644
--- a/drivers/gpio/gpio-msm-v1.c
+++ b/drivers/gpio/gpio-msm-v1.c
@@ -567,9 +567,9 @@  static void msm_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 
 	for (i = 0; i < msm_gpio_count; i++) {
 		struct msm_gpio_chip *msm_chip = &msm_gpio_chips[i];
-		val = readl(msm_chip->regs.int_status);
-		val &= msm_chip->int_enable[0];
-		while (val) {
+
+		while (val = (readl(msm_chip->regs.int_status) &
+			      msm_chip->int_enable[0])) {
 			mask = val & -val;
 			j = fls(mask) - 1;
 			/* printk("%s %08x %08x bit %d gpio %d irq %d\n",