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[Linaro-uefi,linaro-uefi,v5,32/44] Hisilicon/SMBIOS: Update ProcessorID from MIDR

Message ID 1480652017-31676-33-git-send-email-heyi.guo@linaro.org
State Superseded
Headers show

Commit Message

gary guo Dec. 2, 2016, 4:13 a.m. UTC
There is no register restore processor id at
ARM Platform,we talked with ARM Charles and made a agreement
that we can use MIDR instead,maybe there will be a specific register
to read the processor id in future.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 .../Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c  | 3 +++
 1 file changed, 3 insertions(+)

Comments

Leif Lindholm Dec. 2, 2016, 3:09 p.m. UTC | #1
On Fri, Dec 02, 2016 at 12:13:25PM +0800, Heyi Guo wrote:
> There is no register restore processor id at
> ARM Platform,we talked with ARM Charles and made a agreement
> that we can use MIDR instead,maybe there will be a specific register
> to read the processor id in future.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>

You could add Charles' Reviewed-by for v5 (he sent it to the list
yesterday):
Reviewed-by: Charles Garcia-Tobin <charles.garcia-tobin@arm.com>

Regards,

Leif

> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> ---
>  .../Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c  | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> index 07dae5f..005d28f 100644
> --- a/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> +++ b/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
> @@ -490,6 +490,7 @@ AddSmbiosProcessorTypeTable (
>      CHAR16                      *CpuVersion;
>      STRING_REF                  TokenToUpdate;
>  
> +    UINT64                      *ProcessorId;
>      Type4Record         = NULL;
>      ProcessorManuStr    = NULL;
>      ProcessorVersionStr = NULL;
> @@ -614,6 +615,8 @@ AddSmbiosProcessorTypeTable (
>      Type4Record->ProcessorCharacteristics   = ProcessorCharacteristics.Data;
>  
>      Type4Record->ExternalClock              = (UINT16)(ArmReadCntFrq() / 1000 / 1000);
> +    ProcessorId = (UINT64 *)&(Type4Record->ProcessorId);
> +    *ProcessorId = ArmReadMidr();
>  
>      OptionalStrStart = (CHAR8 *) (Type4Record + 1);
>      UnicodeStrToAsciiStr (ProcessorSocketStr, OptionalStrStart);
> -- 
> 1.9.1
>
diff mbox

Patch

diff --git a/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c b/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
index 07dae5f..005d28f 100644
--- a/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
+++ b/Chips/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClass.c
@@ -490,6 +490,7 @@  AddSmbiosProcessorTypeTable (
     CHAR16                      *CpuVersion;
     STRING_REF                  TokenToUpdate;
 
+    UINT64                      *ProcessorId;
     Type4Record         = NULL;
     ProcessorManuStr    = NULL;
     ProcessorVersionStr = NULL;
@@ -614,6 +615,8 @@  AddSmbiosProcessorTypeTable (
     Type4Record->ProcessorCharacteristics   = ProcessorCharacteristics.Data;
 
     Type4Record->ExternalClock              = (UINT16)(ArmReadCntFrq() / 1000 / 1000);
+    ProcessorId = (UINT64 *)&(Type4Record->ProcessorId);
+    *ProcessorId = ArmReadMidr();
 
     OptionalStrStart = (CHAR8 *) (Type4Record + 1);
     UnicodeStrToAsciiStr (ProcessorSocketStr, OptionalStrStart);