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[Linaro-uefi,linaro-uefi,v6,08/37] D02/D03/D05: Support Spd mirror mode

Message ID 1481021828-59826-9-git-send-email-heyi.guo@linaro.org
State Superseded
Headers show

Commit Message

gary guo Dec. 6, 2016, 10:56 a.m. UTC
Add Spd mirror mode related registers definition,
this is used by memoryinit binary code,base this definition
it could support spd mirror mode to have diffrent configuration
about MR register.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 Chips/Hisilicon/Include/Library/HwMemInitLib.h | 4 ++++
 1 file changed, 4 insertions(+)
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Patch

diff --git a/Chips/Hisilicon/Include/Library/HwMemInitLib.h b/Chips/Hisilicon/Include/Library/HwMemInitLib.h
index c24930f..2663cad 100644
--- a/Chips/Hisilicon/Include/Library/HwMemInitLib.h
+++ b/Chips/Hisilicon/Include/Library/HwMemInitLib.h
@@ -161,6 +161,7 @@  typedef struct _DDR_DIMM{
     UINT16      DimmSize;
     UINT16      DimmSpeed;
     UINT32      RankSize;
+    UINT8       SpdMirror; //Denote the dram address mapping is standard mode or mirrored mode
     struct DDR_RANK  Rank[MAX_RANK_DIMM];
 }DDR_DIMM;
 
@@ -337,6 +338,7 @@  typedef struct _MEMORY{
     UINT8           Config0;
     UINT8           marginTest;
     UINT8           Config1[5];
+    UINT8           ErrorBypass; //register of spd mirror mode
     UINT32          Config2;
 }MEMORY;
 
@@ -789,6 +791,8 @@  struct ODT_ACTIVE_STRUCT {
 #define SPD_FTB_TAA_DDR4      123   // Fine offset for TAA
 #define SPD_FTB_MAX_TCK_DDR4  124   // Fine offset for max TCK
 #define SPD_FTB_MIN_TCK_DDR4  125   // Fine offset for min TCK
+#define SPD_MIRROR_UNBUFFERED 131   // Unbuffered:Address Mapping from Edge Connector to DRAM
+#define SPD_MIRROR_REGISTERED 136   // Registered:Address Address Mapping from Register to DRAM
 
 #define SPD_MMID_LSB_DDR4     320   // Module Manufacturer ID Code, Least Significant Byte
 #define SPD_MMID_MSB_DDR4     321   // Module Manufacturer ID Code, Most Significant Byte