[Xen-devel,11/13] xen/arm: vgic: Rename emulate_sysreg callback to emulate_reg

Message ID 1481114033-11024-12-git-send-email-julien.grall@arm.com
State New
Headers show

Commit Message

Julien Grall Dec. 7, 2016, 12:33 p.m.
We will want to emulate co-processor registers access in a follow-up
patch.

Signed-off-by: Julien Grall <julien.grall@arm.com>
---
 xen/arch/arm/vgic-v3.c     | 13 ++++++++++++-
 xen/arch/arm/vgic.c        |  4 ++--
 xen/include/asm-arm/vgic.h |  4 ++--
 3 files changed, 16 insertions(+), 5 deletions(-)

Comments

Stefano Stabellini Dec. 7, 2016, 10:44 p.m. | #1
On Wed, 7 Dec 2016, Julien Grall wrote:
> We will want to emulate co-processor registers access in a follow-up
> patch.
> 
> Signed-off-by: Julien Grall <julien.grall@arm.com>

Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>

> ---
>  xen/arch/arm/vgic-v3.c     | 13 ++++++++++++-
>  xen/arch/arm/vgic.c        |  4 ++--
>  xen/include/asm-arm/vgic.h |  4 ++--
>  3 files changed, 16 insertions(+), 5 deletions(-)
> 
> diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
> index e54df0b..f3f0bd2 100644
> --- a/xen/arch/arm/vgic-v3.c
> +++ b/xen/arch/arm/vgic-v3.c
> @@ -1328,6 +1328,17 @@ static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
>      }
>  }
>  
> +static bool vgic_v3_emulate_reg(struct cpu_user_regs *regs, union hsr hsr)
> +{
> +    switch (hsr.ec)
> +    {
> +    case HSR_EC_SYSREG:
> +        return vgic_v3_emulate_sysreg(regs, hsr);
> +    default:
> +        return false;
> +    }
> +}
> +
>  static const struct mmio_handler_ops vgic_rdistr_mmio_handler = {
>      .read  = vgic_v3_rdistr_mmio_read,
>      .write = vgic_v3_rdistr_mmio_write,
> @@ -1491,7 +1502,7 @@ static const struct vgic_ops v3_ops = {
>      .vcpu_init   = vgic_v3_vcpu_init,
>      .domain_init = vgic_v3_domain_init,
>      .domain_free = vgic_v3_domain_free,
> -    .emulate_sysreg  = vgic_v3_emulate_sysreg,
> +    .emulate_reg  = vgic_v3_emulate_reg,
>      /*
>       * We use both AFF1 and AFF0 in (v)MPIDR. Thus, the max number of CPU
>       * that can be supported is up to 4096(==256*16) in theory.
> diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
> index 196e86b..364d5f0 100644
> --- a/xen/arch/arm/vgic.c
> +++ b/xen/arch/arm/vgic.c
> @@ -550,9 +550,9 @@ bool vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
>  {
>      struct vcpu *v = current;
>  
> -    ASSERT(v->domain->arch.vgic.handler->emulate_sysreg != NULL);
> +    ASSERT(v->domain->arch.vgic.handler->emulate_reg != NULL);
>  
> -    return v->domain->arch.vgic.handler->emulate_sysreg(regs, hsr);
> +    return v->domain->arch.vgic.handler->emulate_reg(regs, hsr);
>  }
>  
>  bool vgic_reserve_virq(struct domain *d, unsigned int virq)
> diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
> index fadb1e1..672f649 100644
> --- a/xen/include/asm-arm/vgic.h
> +++ b/xen/include/asm-arm/vgic.h
> @@ -130,8 +130,8 @@ struct vgic_ops {
>      int (*domain_init)(struct domain *d);
>      /* Release resources that were allocated by domain_init */
>      void (*domain_free)(struct domain *d);
> -    /* vGIC sysreg emulation */
> -    bool (*emulate_sysreg)(struct cpu_user_regs *regs, union hsr hsr);
> +    /* vGIC sysreg/cpregs emulate */
> +    bool (*emulate_reg)(struct cpu_user_regs *regs, union hsr hsr);
>      /* Maximum number of vCPU supported */
>      const unsigned int max_vcpus;
>  };
> -- 
> 1.9.1
>

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diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index e54df0b..f3f0bd2 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -1328,6 +1328,17 @@  static bool vgic_v3_emulate_sysreg(struct cpu_user_regs *regs, union hsr hsr)
     }
 }
 
+static bool vgic_v3_emulate_reg(struct cpu_user_regs *regs, union hsr hsr)
+{
+    switch (hsr.ec)
+    {
+    case HSR_EC_SYSREG:
+        return vgic_v3_emulate_sysreg(regs, hsr);
+    default:
+        return false;
+    }
+}
+
 static const struct mmio_handler_ops vgic_rdistr_mmio_handler = {
     .read  = vgic_v3_rdistr_mmio_read,
     .write = vgic_v3_rdistr_mmio_write,
@@ -1491,7 +1502,7 @@  static const struct vgic_ops v3_ops = {
     .vcpu_init   = vgic_v3_vcpu_init,
     .domain_init = vgic_v3_domain_init,
     .domain_free = vgic_v3_domain_free,
-    .emulate_sysreg  = vgic_v3_emulate_sysreg,
+    .emulate_reg  = vgic_v3_emulate_reg,
     /*
      * We use both AFF1 and AFF0 in (v)MPIDR. Thus, the max number of CPU
      * that can be supported is up to 4096(==256*16) in theory.
diff --git a/xen/arch/arm/vgic.c b/xen/arch/arm/vgic.c
index 196e86b..364d5f0 100644
--- a/xen/arch/arm/vgic.c
+++ b/xen/arch/arm/vgic.c
@@ -550,9 +550,9 @@  bool vgic_emulate(struct cpu_user_regs *regs, union hsr hsr)
 {
     struct vcpu *v = current;
 
-    ASSERT(v->domain->arch.vgic.handler->emulate_sysreg != NULL);
+    ASSERT(v->domain->arch.vgic.handler->emulate_reg != NULL);
 
-    return v->domain->arch.vgic.handler->emulate_sysreg(regs, hsr);
+    return v->domain->arch.vgic.handler->emulate_reg(regs, hsr);
 }
 
 bool vgic_reserve_virq(struct domain *d, unsigned int virq)
diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index fadb1e1..672f649 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -130,8 +130,8 @@  struct vgic_ops {
     int (*domain_init)(struct domain *d);
     /* Release resources that were allocated by domain_init */
     void (*domain_free)(struct domain *d);
-    /* vGIC sysreg emulation */
-    bool (*emulate_sysreg)(struct cpu_user_regs *regs, union hsr hsr);
+    /* vGIC sysreg/cpregs emulate */
+    bool (*emulate_reg)(struct cpu_user_regs *regs, union hsr hsr);
     /* Maximum number of vCPU supported */
     const unsigned int max_vcpus;
 };