[v2,16/16] hw/arm/virt-acpi-build: madt: add vgic maint irq

Message ID 20170102200153.28864-17-drjones@redhat.com
State New
Headers show

Commit Message

Andrew Jones Jan. 2, 2017, 8:01 p.m.
When virtualization is enabled and we have a v3 gic, then we add
the vgic maintenance interrupt to the DT. This patch is the ACPI
equivalent.

Signed-off-by: Andrew Jones <drjones@redhat.com>

---
 hw/arm/virt-acpi-build.c | 3 +++
 1 file changed, 3 insertions(+)

-- 
2.9.3

Comments

Peter Maydell Jan. 6, 2017, 5:13 p.m. | #1
On 2 January 2017 at 20:01, Andrew Jones <drjones@redhat.com> wrote:
> When virtualization is enabled and we have a v3 gic, then we add

> the vgic maintenance interrupt to the DT. This patch is the ACPI

> equivalent.

>

> Signed-off-by: Andrew Jones <drjones@redhat.com>

> ---

>  hw/arm/virt-acpi-build.c | 3 +++

>  1 file changed, 3 insertions(+)

>

> diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c

> index 7c00ee683f44..971ee4885c43 100644

> --- a/hw/arm/virt-acpi-build.c

> +++ b/hw/arm/virt-acpi-build.c

> @@ -607,6 +607,9 @@ build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)

>          if (arm_feature(&armcpu->env, ARM_FEATURE_PMU)) {

>              gicc->performance_interrupt = cpu_to_le32(PPI(VIRTUAL_PMU_IRQ));

>          }

> +        if (vms->virt && vms->gic_version == 3) {

> +            gicc->vgic_interrupt = cpu_to_le32(PPI(ARCH_GICV3_MAINT_IRQ));

> +        }

>      }

>

>      if (vms->gic_version == 3) {


I'm going to squash this change into my "target-arm: Enable EL2 feature bit
on A53 and A57" patch, since it's a trivial diff and that's the patch
which has the "put this into the DTB" change in it.

thanks
-- PMM

Patch

diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 7c00ee683f44..971ee4885c43 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -607,6 +607,9 @@  build_madt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
         if (arm_feature(&armcpu->env, ARM_FEATURE_PMU)) {
             gicc->performance_interrupt = cpu_to_le32(PPI(VIRTUAL_PMU_IRQ));
         }
+        if (vms->virt && vms->gic_version == 3) {
+            gicc->vgic_interrupt = cpu_to_le32(PPI(ARCH_GICV3_MAINT_IRQ));
+        }
     }
 
     if (vms->gic_version == 3) {