diff mbox

[3/3] target/arm: Implement DBGVCR32_EL2 system register

Message ID 1484073849-32666-4-git-send-email-peter.maydell@linaro.org
State Superseded
Headers show

Commit Message

Peter Maydell Jan. 10, 2017, 6:44 p.m. UTC
The DBGVCR_EL2 system register is needed to run a 32-bit
EL1 guest under a Linux EL2 64-bit hypervisor. Its only
purpose is to provide AArch64 with access to the state of
the DBGVCR AArch32 register. Since we only have a dummy
DBGVCR, implement a corresponding dummy DBGVCR32_EL2.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 target/arm/helper.c | 7 +++++++
 1 file changed, 7 insertions(+)

-- 
2.7.4

Comments

Edgar E. Iglesias Jan. 12, 2017, 8:46 p.m. UTC | #1
On Tue, Jan 10, 2017 at 06:44:09PM +0000, Peter Maydell wrote:
> The DBGVCR_EL2 system register is needed to run a 32-bit

> EL1 guest under a Linux EL2 64-bit hypervisor. Its only

> purpose is to provide AArch64 with access to the state of

> the DBGVCR AArch32 register. Since we only have a dummy

> DBGVCR, implement a corresponding dummy DBGVCR32_EL2.

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>


Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>



> ---

>  target/arm/helper.c | 7 +++++++

>  1 file changed, 7 insertions(+)

> 

> diff --git a/target/arm/helper.c b/target/arm/helper.c

> index dc90986..bda562d 100644

> --- a/target/arm/helper.c

> +++ b/target/arm/helper.c

> @@ -4066,6 +4066,13 @@ static const ARMCPRegInfo debug_cp_reginfo[] = {

>        .cp = 14, .opc1 = 0, .crn = 0, .crm = 7, .opc2 = 0,

>        .access = PL1_RW, .accessfn = access_tda,

>        .type = ARM_CP_NOP },

> +    /* Dummy DBGVCR32_EL2 (which is only for a 64-bit hypervisor

> +     * to save and restore a 32-bit guest's DBGVCR)

> +     */

> +    { .name = "DBGVCR32_EL2", .state = ARM_CP_STATE_AA64,

> +      .opc0 = 2, .opc1 = 4, .crn = 0, .crm = 7, .opc2 = 0,

> +      .access = PL2_RW, .accessfn = access_tda,

> +      .type = ARM_CP_NOP },

>      /* Dummy MDCCINT_EL1, since we don't implement the Debug Communications

>       * Channel but Linux may try to access this register. The 32-bit

>       * alias is DBGDCCINT.

> -- 

> 2.7.4

>
diff mbox

Patch

diff --git a/target/arm/helper.c b/target/arm/helper.c
index dc90986..bda562d 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -4066,6 +4066,13 @@  static const ARMCPRegInfo debug_cp_reginfo[] = {
       .cp = 14, .opc1 = 0, .crn = 0, .crm = 7, .opc2 = 0,
       .access = PL1_RW, .accessfn = access_tda,
       .type = ARM_CP_NOP },
+    /* Dummy DBGVCR32_EL2 (which is only for a 64-bit hypervisor
+     * to save and restore a 32-bit guest's DBGVCR)
+     */
+    { .name = "DBGVCR32_EL2", .state = ARM_CP_STATE_AA64,
+      .opc0 = 2, .opc1 = 4, .crn = 0, .crm = 7, .opc2 = 0,
+      .access = PL2_RW, .accessfn = access_tda,
+      .type = ARM_CP_NOP },
     /* Dummy MDCCINT_EL1, since we don't implement the Debug Communications
      * Channel but Linux may try to access this register. The 32-bit
      * alias is DBGDCCINT.